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Teach the address selector to make 'reg+reg' addressing modes.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19457 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
2005-01-11 04:40:19 +00:00
parent 99f997d2c1
commit a95589be3f
1 changed files with 11 additions and 2 deletions
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13
lib/Target/X86/X86ISelPattern.cpp
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@@ -443,9 +443,18 @@ bool ISel::SelectAddress(SDOperand N, X86AddressMode &AM) {
} }
} }
if (AM.BaseType != X86AddressMode::RegBase || // Is the base register already occupied?
AM.Base.Reg) if (AM.BaseType != X86AddressMode::RegBase || AM.Base.Reg) {
// If so, check to see if the scale index register is set.
if (AM.IndexReg == 0) {
AM.IndexReg = SelectExpr(N);
AM.Scale = 1;
return false;
}
// Otherwise, we cannot select it.
return true; return true;
}
// Default, generate it as a register. // Default, generate it as a register.
AM.BaseType = X86AddressMode::RegBase; AM.BaseType = X86AddressMode::RegBase;