6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-06-26 07:24:25 +00:00
Code Issues Projects Releases Wiki Activity

Disassembly of tBcc was wrongly adding 4 to the SignExtend'ed imm8:'0' immediate operand.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131565 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Johnny Chen
2011-05-18 20:32:41 +00:00
parent d46ba26a6b
commit a96581f4f7
2 changed files with 4 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h
View File

@ -957,7 +957,7 @@ static bool DisassembleThumb1CondBr(MCInst &MI, unsigned Opcode, uint32_t insn,
unsigned Imm8 = getT1Imm8(insn);
MI.addOperand(MCOperand::CreateImm(
Opcode == ARM::tBcc ? SignExtend32<9>(Imm8 << 1) + 4
Opcode == ARM::tBcc ? SignExtend32<9>(Imm8 << 1)
: (int)Imm8));
// Predicate operands by ARMBasicMCBuilder::TryPredicateAndSBitModifier().