Fix UnitTests/2005-05-13-SDivTwo.c

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21985 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2005-05-13 21:48:20 +00:00
parent 3648c67eb2
commit a96e577f53
2 changed files with 4 additions and 3 deletions

View File

@ -2675,7 +2675,6 @@ unsigned ISel::SelectExpr(SDOperand N) {
}
if (RHS && (RHS & (RHS-1)) == 0) { // Signed division by power of 2?
unsigned Log = log2(RHS);
unsigned TmpReg = MakeReg(N.getValueType());
unsigned SAROpc, SHROpc, ADDOpc, NEGOpc;
switch (N.getValueType()) {
default: assert("Unknown type to signed divide!");
@ -2698,10 +2697,12 @@ unsigned ISel::SelectExpr(SDOperand N) {
NEGOpc = X86::NEG32r;
break;
}
unsigned RegSize = MVT::getSizeInBits(N.getValueType());
Tmp1 = SelectExpr(N.getOperand(0));
unsigned TmpReg = MakeReg(N.getValueType());
BuildMI(BB, SAROpc, 2, TmpReg).addReg(Tmp1).addImm(Log-1);
unsigned TmpReg2 = MakeReg(N.getValueType());
BuildMI(BB, SHROpc, 2, TmpReg2).addReg(TmpReg).addImm(32-Log);
BuildMI(BB, SHROpc, 2, TmpReg2).addReg(TmpReg).addImm(RegSize-Log);
unsigned TmpReg3 = MakeReg(N.getValueType());
BuildMI(BB, ADDOpc, 2, TmpReg3).addReg(Tmp1).addReg(TmpReg2);

View File

@ -2924,7 +2924,7 @@ void X86ISel::emitDivRemOperation(MachineBasicBlock *BB,
.addReg(Op0Reg).addImm(Log-1);
unsigned TmpReg2 = makeAnotherReg(Op0->getType());
BuildMI(*BB, IP, SHROpcode[Class], 2, TmpReg2)
.addReg(TmpReg).addImm(32-Log);
.addReg(TmpReg).addImm(CI->getType()->getPrimitiveSizeInBits()-Log);
unsigned TmpReg3 = makeAnotherReg(Op0->getType());
BuildMI(*BB, IP, ADDOpcode[Class], 2, TmpReg3)
.addReg(Op0Reg).addReg(TmpReg2);