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[XCore] Add missing u10 / lu10 instructions.
These instructions are not targeted by the compiler but they are needed for the MC layer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175404 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -661,7 +661,6 @@ let Uses = [SP], Defs = [SP], mayLoad = 1 in
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defm KRESTSP : FU6_LU6_np<0b0111101111, "krestsp">;
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// U10
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// TODO ldwcpl, blacp
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let Defs = [R11], isReMaterializable = 1, neverHasSideEffects = 1 in
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def LDAPF_u10 : _FU10<0b110110, (outs), (ins i32imm:$a), "ldap r11, $a", []>;
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@ -677,6 +676,10 @@ def LDAPF_lu10_ba : _FLU10<0b110110, (outs), (ins i32imm:$a), "ldap r11, $a",
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let isCall=1,
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// All calls clobber the link register and the non-callee-saved registers:
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Defs = [R0, R1, R2, R3, R11, LR], Uses = [SP] in {
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def BLACP_u10 : _FU10<0b111000, (outs), (ins i32imm:$a), "bla cp[$a]", []>;
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def BLACP_lu10 : _FLU10<0b111000, (outs), (ins i32imm:$a), "bla cp[$a]", []>;
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def BLRF_u10 : _FU10<0b110100, (outs), (ins calltarget:$a), "bl $a",
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[(XCoreBranchLink immU10:$a)]>;
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@ -684,6 +687,14 @@ def BLRF_lu10 : _FLU10<0b110100, (outs), (ins calltarget:$a), "bl $a",
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[(XCoreBranchLink immU20:$a)]>;
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}
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let Defs = [R11], mayLoad = 1, isReMaterializable = 1,
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neverHasSideEffects = 1 in {
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def LDWCP_u10 : _FU10<0b111001, (outs), (ins i32imm:$a), "ldw r11, cp[$a]", []>;
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def LDWCP_lu10 : _FLU10<0b111001, (outs), (ins i32imm:$a), "ldw r11, cp[$a]",
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[]>;
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}
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// Two operand short
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// TODO eet, eef, tsetmr
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def NOT : _F2R<0b100010, (outs GRRegs:$dst), (ins GRRegs:$b),
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@ -589,6 +589,18 @@
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# CHECK: bl 38631
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0x25 0xf0 0xe7 0xd2
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# CHECK: bla cp[500]
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0xf4 0xe1
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# CHECK: bla cp[413742]
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0x94 0xf1 0x2e 0xe0
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# CHECK: ldw r11, cp[132]
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0x84 0xe4
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# CHECK: ldw r11, cp[3444]
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0x35 0xf0 0xf4 0x6e
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# l6r instructions
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# CHECK: lmul r11, r0, r2, r5, r8, r10
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