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R600/SI: Don't store scratch buffer frame index in MUBUF offset field

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We don't have a good way of legalizing this if the frame index offset
is more than the 12-bits, which is size of MUBUF's offset field, so
now we store the frame index in the vaddr field.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226584 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tom Stellard 2015-01-20 17:49:43 +00:00
parent 2a2bde40ab
commit a978a481bb
2 changed files with 81 additions and 16 deletions
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16
lib/Target/R600/AMDGPUISelDAGToDAG.cpp
View File

@ -988,22 +988,6 @@ bool AMDGPUDAGToDAGISel::SelectMUBUFScratch(SDValue Addr, SDValue &Rsrc,
}
}
// (add FI, n0)
if ((Addr.getOpcode() == ISD::ADD || Addr.getOpcode() == ISD::OR) &&
isa<FrameIndexSDNode>(Addr.getOperand(0))) {
VAddr = Addr.getOperand(1);
ImmOffset = Addr.getOperand(0);
return true;
}
// (FI)
if (isa<FrameIndexSDNode>(Addr)) {
VAddr = SDValue(CurDAG->getMachineNode(AMDGPU::V_MOV_B32_e32, DL, MVT::i32,
CurDAG->getConstant(0, MVT::i32)), 0);
ImmOffset = Addr;
return true;
}
// (node)
VAddr = Addr;
ImmOffset = CurDAG->getTargetConstant(0, MVT::i16);

81
test/CodeGen/R600/scratch-buffer.ll Normal file
View File

@ -0,0 +1,81 @@
; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=SI < %s | FileCheck %s
; When a frame index offset is more than 12-bits, make sure we don't store
; it in mubuf's offset field.
; CHECK-LABEL: {{^}}legal_offset_fi:
; CHECK: buffer_store_dword v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9]+}}:{{[0-9]+}}], s{{[0-9]+}} offen
; CHECK: v_mov_b32_e32 [[OFFSET:v[0-9]+]], 0x8000
; CHECK: buffer_store_dword v{{[0-9]+}}, [[OFFSET]], s[{{[0-9]+}}:{{[0-9]+}}], s{{[0-9]+}} offen{{$}}
define void @legal_offset_fi(i32 addrspace(1)* %out, i32 %cond, i32 %if_offset, i32 %else_offset) {
entry:
%scratch0 = alloca [8192 x i32]
%scratch1 = alloca [8192 x i32]
%scratchptr0 = getelementptr [8192 x i32]* %scratch0, i32 0, i32 0
store i32 1, i32* %scratchptr0
%scratchptr1 = getelementptr [8192 x i32]* %scratch1, i32 0, i32 0
store i32 2, i32* %scratchptr1
%cmp = icmp eq i32 %cond, 0
br i1 %cmp, label %if, label %else
if:
%if_ptr = getelementptr [8192 x i32]* %scratch0, i32 0, i32 %if_offset
%if_value = load i32* %if_ptr
br label %done
else:
%else_ptr = getelementptr [8192 x i32]* %scratch1, i32 0, i32 %else_offset
%else_value = load i32* %else_ptr
br label %done
done:
%value = phi i32 [%if_value, %if], [%else_value, %else]
store i32 %value, i32 addrspace(1)* %out
ret void
ret void
}
; CHECK-LABEL: {{^}}legal_offset_fi_offset
; CHECK: buffer_store_dword v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9]+}}:{{[0-9]+}}], s{{[0-9]+}} offen
; CHECK: v_add_i32_e32 [[OFFSET:v[0-9]+]], 0x8000
; CHECK: buffer_store_dword v{{[0-9]+}}, [[OFFSET]], s[{{[0-9]+}}:{{[0-9]+}}], s{{[0-9]+}} offen{{$}}
define void @legal_offset_fi_offset(i32 addrspace(1)* %out, i32 %cond, i32 addrspace(1)* %offsets, i32 %if_offset, i32 %else_offset) {
entry:
%scratch0 = alloca [8192 x i32]
%scratch1 = alloca [8192 x i32]
%offset0 = load i32 addrspace(1)* %offsets
%scratchptr0 = getelementptr [8192 x i32]* %scratch0, i32 0, i32 %offset0
store i32 %offset0, i32* %scratchptr0
%offsetptr1 = getelementptr i32 addrspace(1)* %offsets, i32 1
%offset1 = load i32 addrspace(1)* %offsetptr1
%scratchptr1 = getelementptr [8192 x i32]* %scratch1, i32 0, i32 %offset1
store i32 %offset1, i32* %scratchptr1
%cmp = icmp eq i32 %cond, 0
br i1 %cmp, label %if, label %else
if:
%if_ptr = getelementptr [8192 x i32]* %scratch0, i32 0, i32 %if_offset
%if_value = load i32* %if_ptr
br label %done
else:
%else_ptr = getelementptr [8192 x i32]* %scratch1, i32 0, i32 %else_offset
%else_value = load i32* %else_ptr
br label %done
done:
%value = phi i32 [%if_value, %if], [%else_value, %else]
store i32 %value, i32 addrspace(1)* %out
ret void
}