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Replace copyRegToReg with copyPhysReg for XCore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108087 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -356,37 +356,31 @@ XCoreInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
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return 2;
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return 2;
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}
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}
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bool XCoreInstrInfo::copyRegToReg(MachineBasicBlock &MBB,
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void XCoreInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I,
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MachineBasicBlock::iterator I, DebugLoc DL,
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unsigned DestReg, unsigned SrcReg,
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unsigned DestReg, unsigned SrcReg,
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const TargetRegisterClass *DestRC,
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bool KillSrc) const {
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const TargetRegisterClass *SrcRC,
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bool GRDest = XCore::GRRegsRegClass.contains(DestReg);
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DebugLoc DL) const {
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bool GRSrc = XCore::GRRegsRegClass.contains(SrcReg);
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if (DestRC == SrcRC) {
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if (GRDest && GRSrc) {
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if (DestRC == XCore::GRRegsRegisterClass) {
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BuildMI(MBB, I, DL, get(XCore::ADD_2rus), DestReg)
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BuildMI(MBB, I, DL, get(XCore::ADD_2rus), DestReg)
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.addReg(SrcReg)
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.addReg(SrcReg, getKillRegState(KillSrc))
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.addImm(0);
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.addImm(0);
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return true;
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return;
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} else {
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return false;
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}
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}
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}
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if (SrcRC == XCore::RRegsRegisterClass && SrcReg == XCore::SP &&
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if (GRDest && SrcReg == XCore::SP) {
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DestRC == XCore::GRRegsRegisterClass) {
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BuildMI(MBB, I, DL, get(XCore::LDAWSP_ru6), DestReg).addImm(0);
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BuildMI(MBB, I, DL, get(XCore::LDAWSP_ru6), DestReg)
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return;
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.addImm(0);
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return true;
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}
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}
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if (DestRC == XCore::RRegsRegisterClass && DestReg == XCore::SP &&
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SrcRC == XCore::GRRegsRegisterClass) {
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if (DestReg == XCore::SP && GRSrc) {
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BuildMI(MBB, I, DL, get(XCore::SETSP_1r))
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BuildMI(MBB, I, DL, get(XCore::SETSP_1r))
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.addReg(SrcReg);
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.addReg(SrcReg, getKillRegState(KillSrc));
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return true;
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return;
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}
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}
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return false;
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llvm_unreachable("Impossible reg-to-reg copy");
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}
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}
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void XCoreInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
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void XCoreInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
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@ -64,12 +64,10 @@ public:
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virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const;
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virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const;
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virtual bool copyRegToReg(MachineBasicBlock &MBB,
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virtual void copyPhysReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I,
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MachineBasicBlock::iterator I, DebugLoc DL,
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unsigned DestReg, unsigned SrcReg,
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unsigned DestReg, unsigned SrcReg,
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const TargetRegisterClass *DestRC,
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bool KillSrc) const;
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const TargetRegisterClass *SrcRC,
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DebugLoc DL) const;
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virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
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virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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MachineBasicBlock::iterator MI,
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