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Some comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33707 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -420,6 +420,7 @@ MachineBasicBlock *ARMConstantIslands::SplitBlockBeforeInstr(MachineInstr *MI) {
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NewBB->splice(NewBB->end(), OrigBB, MI, OrigBB->end());
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// Add an unconditional branch from OrigBB to NewBB.
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// Note the new unconditional branch is not being recorded.
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BuildMI(OrigBB, TII->get(isThumb ? ARM::tB : ARM::B)).addMBB(NewBB);
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NumSplit++;
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@ -498,6 +499,7 @@ bool ARMConstantIslands::HandleConstantPoolUser(MachineFunction &Fn, CPUser &U){
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assert(BBHasFallthrough(UserMBB) && "Expected a fallthrough BB!");
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NewMBB = next(MachineFunction::iterator(UserMBB));
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// Add an unconditional branch from UserMBB to fallthrough block.
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// Note the new unconditional branch is not being recorded.
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BuildMI(UserMBB, TII->get(isThumb ? ARM::tB : ARM::B)).addMBB(NewMBB);
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BBSizes[UserMBB->getNumber()] += isThumb ? 2 : 4;
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} else {
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@ -590,7 +592,9 @@ ARMConstantIslands::FixUpUnconditionalBr(MachineFunction &Fn, ImmBranch &Br) {
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return true;
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}
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static inline unsigned getUncondBranchDisp(int Opc) {
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/// getUnconditionalBrDisp - Returns the maximum displacement that can fit in the
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/// specific unconditional branch instruction.
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static inline unsigned getUnconditionalBrDisp(int Opc) {
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return (Opc == ARM::tB) ? (1<<10)*2 : (1<<23)*4;
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}
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@ -653,7 +657,7 @@ ARMConstantIslands::FixUpConditionalBr(MachineFunction &Fn, ImmBranch &Br) {
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BuildMI(MBB, TII->get(MI->getOpcode())).addMBB(NextBB).addImm(CC);
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Br.MI = &MBB->back();
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BuildMI(MBB, TII->get(Br.UncondBr)).addMBB(DestBB);
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unsigned MaxDisp = getUncondBranchDisp(Br.UncondBr);
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unsigned MaxDisp = getUnconditionalBrDisp(Br.UncondBr);
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ImmBranches.push_back(ImmBranch(&MBB->back(), MaxDisp, false, Br.UncondBr));
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MI->eraseFromParent();
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