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split call operands out to their own encoding class, simplifying

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code in the JIT.  Use this to form the first fixup for the PPC backend,
giving us stuff like this:

	bl L_foo$stub ; encoding: [0b010010AA,A,A,0bAAAAAA01]
                                        ;   fixup A - offset: 0, value: L_foo$stub, kind: fixup_ppc_br24


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119123 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
2010-11-15 05:57:53 +00:00
parent 3170a3bc04
commit a9d9ab9673
4 changed files with 128 additions and 75 deletions
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20
lib/Target/PowerPC/PPCMCCodeEmitter.cpp
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@@ -14,6 +14,7 @@
#define DEBUG_TYPE "mccodeemitter"
#include "PPC.h"
#include "PPCRegisterInfo.h"
#include "PPCFixupKinds.h"
#include "llvm/MC/MCCodeEmitter.h"
#include "llvm/MC/MCInst.h"
#include "llvm/ADT/Statistic.h"
@@ -37,12 +38,12 @@ public:
~PPCMCCodeEmitter() {}
unsigned getNumFixupKinds() const { return 0 /*PPC::NumTargetFixupKinds*/; }
unsigned getNumFixupKinds() const { return PPC::NumTargetFixupKinds; }
const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const {
const static MCFixupKindInfo Infos[] = {
// name offset bits flags
{ "fixup_arm_pcrel_12", 2, 12, MCFixupKindInfo::FKF_IsPCRel }
{ "fixup_ppc_br24", 6, 24, MCFixupKindInfo::FKF_IsPCRel }
#if 0
{ "fixup_arm_vfp_pcrel_12", 3, 8, MCFixupKindInfo::FKF_IsPCRel },
{ "fixup_arm_branch", 1, 24, MCFixupKindInfo::FKF_IsPCRel },
@@ -57,6 +58,9 @@ public:
return Infos[Kind - FirstTargetFixupKind];
}
unsigned getCallTargetEncoding(const MCInst &MI, unsigned OpNo,
SmallVectorImpl<MCFixup> &Fixups) const;
unsigned get_crbitm_encoding(const MCInst &MI, unsigned OpNo,
SmallVectorImpl<MCFixup> &Fixups) const;
@@ -91,6 +95,18 @@ MCCodeEmitter *llvm::createPPCMCCodeEmitter(const Target &, TargetMachine &TM,
return new PPCMCCodeEmitter(TM, Ctx);
}
unsigned PPCMCCodeEmitter::
getCallTargetEncoding(const MCInst &MI, unsigned OpNo,
SmallVectorImpl<MCFixup> &Fixups) const {
const MCOperand &MO = MI.getOperand(OpNo);
if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups);
// Add a fixup for the branch target.
Fixups.push_back(MCFixup::Create(0, MO.getExpr(),
(MCFixupKind)PPC::fixup_ppc_br24));
return 0;
}
unsigned PPCMCCodeEmitter::
get_crbitm_encoding(const MCInst &MI, unsigned OpNo,
SmallVectorImpl<MCFixup> &Fixups) const {