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R600/SI: Implement SIInstrInfo::isTriviallyRematerializable()

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205188 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tom Stellard 2014-03-31 14:01:56 +00:00
parent 1f143aa3e9
commit aa23732edd
2 changed files with 15 additions and 0 deletions
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12
lib/Target/R600/SIInstrInfo.cpp
View File

@ -308,6 +308,18 @@ SIInstrInfo::isSafeToMoveRegClassDefs(const TargetRegisterClass *RC) const {
return RC != &AMDGPU::EXECRegRegClass;
}
bool
SIInstrInfo::isTriviallyReMaterializable(const MachineInstr *MI,
AliasAnalysis *AA) const {
switch(MI->getOpcode()) {
default: return AMDGPUInstrInfo::isTriviallyReMaterializable(MI, AA);
case AMDGPU::S_MOV_B32:
case AMDGPU::S_MOV_B64:
case AMDGPU::V_MOV_B32_e32:
return MI->getOperand(1).isImm();
}
}
namespace llvm {
namespace AMDGPU {
// Helper function generated by tablegen. We are wrapping this with

3
lib/Target/R600/SIInstrInfo.h
View File

@ -77,6 +77,9 @@ public:
virtual MachineInstr *commuteInstruction(MachineInstr *MI,
bool NewMI=false) const;
bool isTriviallyReMaterializable(const MachineInstr *MI,
AliasAnalysis *AA = 0) const;
virtual unsigned getIEQOpcode() const {
llvm_unreachable("Unimplemented");
}