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add an optimized form of OPC_EmitMergeInputChains for the 1, 0 and

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1, 1 cases which are by-far the most frequent.  This shrinks the X86
isel table from 77014 -> 74657 bytes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99740 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2010-03-28 05:50:16 +00:00
parent 856fb395e4
commit aa4e3391c8
3 changed files with 38 additions and 0 deletions
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2
include/llvm/CodeGen/SelectionDAGISel.h
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@ -136,6 +136,8 @@ public:
OPC_EmitRegister, OPC_EmitRegister,
OPC_EmitConvertToTarget, OPC_EmitConvertToTarget,
OPC_EmitMergeInputChains, OPC_EmitMergeInputChains,
OPC_EmitMergeInputChains1_0,
OPC_EmitMergeInputChains1_1,
OPC_EmitCopyToReg, OPC_EmitCopyToReg,
OPC_EmitNodeXForm, OPC_EmitNodeXForm,
OPC_EmitNode, OPC_EmitNode,

29
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
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@ -2440,6 +2440,35 @@ SelectCodeCommon(SDNode *NodeToMatch, const unsigned char *MatcherTable,
continue; continue;
} }
case OPC_EmitMergeInputChains1_0: // OPC_EmitMergeInputChains, 1, 0
case OPC_EmitMergeInputChains1_1: { // OPC_EmitMergeInputChains, 1, 1
// These are space-optimized forms of OPC_EmitMergeInputChains.
assert(InputChain.getNode() == 0 &&
"EmitMergeInputChains should be the first chain producing node");
assert(ChainNodesMatched.empty() &&
"Should only have one EmitMergeInputChains per match");
// Read all of the chained nodes.
unsigned RecNo = Opcode == OPC_EmitMergeInputChains1_1;
assert(RecNo < RecordedNodes.size() && "Invalid CheckSame");
ChainNodesMatched.push_back(RecordedNodes[RecNo].getNode());
// FIXME: What if other value results of the node have uses not matched
// by this pattern?
if (ChainNodesMatched.back() != NodeToMatch &&
!RecordedNodes[RecNo].hasOneUse()) {
ChainNodesMatched.clear();
break;
}
// Merge the input chains if they are not intra-pattern references.
InputChain = HandleMergeInputChains(ChainNodesMatched, CurDAG);
if (InputChain.getNode() == 0)
break; // Failed to merge.
continue;
}
case OPC_EmitMergeInputChains: { case OPC_EmitMergeInputChains: {
assert(InputChain.getNode() == 0 && assert(InputChain.getNode() == 0 &&
"EmitMergeInputChains should be the first chain producing node"); "EmitMergeInputChains should be the first chain producing node");

7
utils/TableGen/DAGISelMatcherEmitter.cpp
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@ -449,6 +449,13 @@ EmitMatcher(const Matcher *N, unsigned Indent, unsigned CurrentIdx,
case Matcher::EmitMergeInputChains: { case Matcher::EmitMergeInputChains: {
const EmitMergeInputChainsMatcher *MN = const EmitMergeInputChainsMatcher *MN =
cast<EmitMergeInputChainsMatcher>(N); cast<EmitMergeInputChainsMatcher>(N);
// Handle the specialized forms OPC_EmitMergeInputChains1_0 and 1_1.
if (MN->getNumNodes() == 1 && MN->getNode(0) < 2) {
OS << "OPC_EmitMergeInputChains1_" << MN->getNode(0) << ",\n";
return 1;
}
OS << "OPC_EmitMergeInputChains, " << MN->getNumNodes() << ", "; OS << "OPC_EmitMergeInputChains, " << MN->getNumNodes() << ", ";
for (unsigned i = 0, e = MN->getNumNodes(); i != e; ++i) for (unsigned i = 0, e = MN->getNumNodes(); i != e; ++i)
OS << MN->getNode(i) << ", "; OS << MN->getNode(i) << ", ";