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Check for overflow when scaling up an add or an addrec for
scaled reuse. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96692 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -337,6 +337,33 @@ void Formula::dump() const {
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print(errs()); errs() << '\n';
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}
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/// isAddRecSExtable - Return true if the given addrec can be sign-extended
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/// without changing its value.
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static bool isAddRecSExtable(const SCEVAddRecExpr *AR, ScalarEvolution &SE) {
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const Type *WideTy =
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IntegerType::get(SE.getContext(),
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SE.getTypeSizeInBits(AR->getType()) + 1);
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return isa<SCEVAddRecExpr>(SE.getSignExtendExpr(AR, WideTy));
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}
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/// isAddSExtable - Return true if the given add can be sign-extended
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/// without changing its value.
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static bool isAddSExtable(const SCEVAddExpr *A, ScalarEvolution &SE) {
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const Type *WideTy =
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IntegerType::get(SE.getContext(),
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SE.getTypeSizeInBits(A->getType()) + 1);
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return isa<SCEVAddExpr>(SE.getSignExtendExpr(A, WideTy));
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}
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/// isMulSExtable - Return true if the given add can be sign-extended
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/// without changing its value.
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static bool isMulSExtable(const SCEVMulExpr *A, ScalarEvolution &SE) {
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const Type *WideTy =
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IntegerType::get(SE.getContext(),
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SE.getTypeSizeInBits(A->getType()) + 1);
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return isa<SCEVMulExpr>(SE.getSignExtendExpr(A, WideTy));
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}
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/// getSDiv - Return an expression for LHS /s RHS, if it can be determined,
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/// or null otherwise. If IgnoreSignificantBits is true, expressions like
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/// (X * Y) /s Y are simplified to Y, ignoring that the multiplication may
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@ -365,33 +392,37 @@ static const SCEV *getSDiv(const SCEV *LHS, const SCEV *RHS,
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.sdiv(RC->getValue()->getValue()));
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}
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// Distribute the sdiv over addrec operands.
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// Distribute the sdiv over addrec operands, if the addrec doesn't overflow.
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if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(LHS)) {
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const SCEV *Start = getSDiv(AR->getStart(), RHS, SE,
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IgnoreSignificantBits);
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if (!Start) return 0;
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const SCEV *Step = getSDiv(AR->getStepRecurrence(SE), RHS, SE,
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IgnoreSignificantBits);
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if (!Step) return 0;
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return SE.getAddRecExpr(Start, Step, AR->getLoop());
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if (IgnoreSignificantBits || isAddRecSExtable(AR, SE)) {
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const SCEV *Start = getSDiv(AR->getStart(), RHS, SE,
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IgnoreSignificantBits);
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if (!Start) return 0;
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const SCEV *Step = getSDiv(AR->getStepRecurrence(SE), RHS, SE,
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IgnoreSignificantBits);
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if (!Step) return 0;
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return SE.getAddRecExpr(Start, Step, AR->getLoop());
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}
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}
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// Distribute the sdiv over add operands.
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// Distribute the sdiv over add operands, if the add doesn't overflow.
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if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(LHS)) {
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SmallVector<const SCEV *, 8> Ops;
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for (SCEVAddExpr::op_iterator I = Add->op_begin(), E = Add->op_end();
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I != E; ++I) {
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const SCEV *Op = getSDiv(*I, RHS, SE,
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IgnoreSignificantBits);
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if (!Op) return 0;
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Ops.push_back(Op);
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if (IgnoreSignificantBits || isAddSExtable(Add, SE)) {
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SmallVector<const SCEV *, 8> Ops;
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for (SCEVAddExpr::op_iterator I = Add->op_begin(), E = Add->op_end();
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I != E; ++I) {
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const SCEV *Op = getSDiv(*I, RHS, SE,
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IgnoreSignificantBits);
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if (!Op) return 0;
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Ops.push_back(Op);
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}
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return SE.getAddExpr(Ops);
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}
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return SE.getAddExpr(Ops);
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}
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// Check for a multiply operand that we can pull RHS out of.
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if (const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(LHS))
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if (IgnoreSignificantBits || Mul->hasNoSignedWrap()) {
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if (IgnoreSignificantBits || isMulSExtable(Mul, SE)) {
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SmallVector<const SCEV *, 4> Ops;
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bool Found = false;
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for (SCEVMulExpr::op_iterator I = Mul->op_begin(), E = Mul->op_end();
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37
test/CodeGen/X86/lsr-wrap.ll
Normal file
37
test/CodeGen/X86/lsr-wrap.ll
Normal file
@ -0,0 +1,37 @@
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; RUN: llc -march=x86-64 < %s | FileCheck %s
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; LSR would like to use a single IV for both of these, however it's
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; not safe due to wraparound.
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; CHECK: addb $-4, %r
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; CHECK: decw %
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@g_19 = common global i32 0 ; <i32*> [#uses=2]
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declare i32 @func_8(i8 zeroext) nounwind
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declare i32 @func_3(i8 signext) nounwind
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define void @func_1() nounwind {
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entry:
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br label %bb
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bb: ; preds = %bb, %entry
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%indvar = phi i16 [ 0, %entry ], [ %indvar.next, %bb ] ; <i16> [#uses=2]
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%tmp = sub i16 0, %indvar ; <i16> [#uses=1]
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%tmp27 = trunc i16 %tmp to i8 ; <i8> [#uses=1]
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%tmp1 = load i32* @g_19, align 4 ; <i32> [#uses=2]
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%tmp2 = add i32 %tmp1, 1 ; <i32> [#uses=1]
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store i32 %tmp2, i32* @g_19, align 4
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%tmp3 = trunc i32 %tmp1 to i8 ; <i8> [#uses=1]
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%tmp4 = tail call i32 @func_8(i8 zeroext %tmp3) nounwind ; <i32> [#uses=0]
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%tmp5 = shl i8 %tmp27, 2 ; <i8> [#uses=1]
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%tmp6 = add i8 %tmp5, -112 ; <i8> [#uses=1]
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%tmp7 = tail call i32 @func_3(i8 signext %tmp6) nounwind ; <i32> [#uses=0]
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%indvar.next = add i16 %indvar, 1 ; <i16> [#uses=2]
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%exitcond = icmp eq i16 %indvar.next, -28 ; <i1> [#uses=1]
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br i1 %exitcond, label %return, label %bb
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return: ; preds = %bb
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ret void
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}
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