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simplify some code.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43198 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
2007-10-20 04:09:48 +00:00
parent d20154c762
commit aaeb0c8666
1 changed files with 1 additions and 1 deletions
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lib/CodeGen/SelectionDAG/LegalizeDAGTypes.cpp
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@@ -668,7 +668,7 @@ SDOperand DAGTypeLegalizer::PromoteResult_SRL(SDNode *N) {
// The input value must be properly zero extended. // The input value must be properly zero extended.
MVT::ValueType VT = N->getValueType(0); MVT::ValueType VT = N->getValueType(0);
MVT::ValueType NVT = TLI.getTypeToTransformTo(VT); MVT::ValueType NVT = TLI.getTypeToTransformTo(VT);
SDOperand Res = DAG.getZeroExtendInReg(GetPromotedOp(N->getOperand(0)), VT); SDOperand Res = GetPromotedZExtOp(N->getOperand(0));
return DAG.getNode(ISD::SRL, NVT, Res, N->getOperand(1)); return DAG.getNode(ISD::SRL, NVT, Res, N->getOperand(1));
} }