From aaf414c92c0247025d6cf31f684895fad7b4c293 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Wed, 21 Jan 2009 02:09:05 +0000 Subject: [PATCH] Favors generating "not" over "xor -1". For example. unsigned test(unsigned a) { return ~a; } llvm used to generate: movl $4294967295, %eax xorl 4(%esp), %eax Now it generates: movl 4(%esp), %eax notl %eax It's 3 bytes shorter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62661 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86InstrInfo.td | 3 +++ test/CodeGen/X86/xor_not.ll | 2 +- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index 73aa15a81d7..fbe03299e07 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -1235,12 +1235,15 @@ let isTwoAddress = 0 in { } } // Defs = [EFLAGS] +// Match xor -1 to not. Favors these over a move imm + xor to save code size. +let AddedComplexity = 15 in { def NOT8r : I<0xF6, MRM2r, (outs GR8 :$dst), (ins GR8 :$src), "not{b}\t$dst", [(set GR8:$dst, (not GR8:$src))]>; def NOT16r : I<0xF7, MRM2r, (outs GR16:$dst), (ins GR16:$src), "not{w}\t$dst", [(set GR16:$dst, (not GR16:$src))]>, OpSize; def NOT32r : I<0xF7, MRM2r, (outs GR32:$dst), (ins GR32:$src), "not{l}\t$dst", [(set GR32:$dst, (not GR32:$src))]>; +} let isTwoAddress = 0 in { def NOT8m : I<0xF6, MRM2m, (outs), (ins i8mem :$dst), "not{b}\t$dst", [(store (not (loadi8 addr:$dst)), addr:$dst)]>; diff --git a/test/CodeGen/X86/xor_not.ll b/test/CodeGen/X86/xor_not.ll index 1e89ca8e053..0b1abdf4152 100644 --- a/test/CodeGen/X86/xor_not.ll +++ b/test/CodeGen/X86/xor_not.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep {not\[lwb\]} | count 3 +; RUN: llvm-as < %s | llc -march=x86 | grep {not\[lwb\]} | count 4 ; RUN: llvm-as < %s | llc -march=x86-64 | grep {not\[lwb\]} | count 4 define i32 @test(i32 %a, i32 %b) nounwind { entry: