6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-11-01 15:11:24 +00:00
Code Issues Projects Releases Wiki Activity

There are no longer any places that require a

Browse Source 
MERGE_VALUES node with only one operand, so get
rid of special code that only existed to handle
that possibility.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60349 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Duncan Sands 2008-12-01 11:41:29 +00:00
parent 1607f05cb7
commit aaffa05d0a
11 changed files with 48 additions and 52 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
include/llvm/CodeGen/SelectionDAG.h
View File

@ -486,19 +486,7 @@ public:
bool ReadMem = true, bool WriteMem = true);
/// getMergeValues - Create a MERGE_VALUES node from the given operands.
/// Allowed to return something different (and simpler) if Simplify is true.
SDValue getMergeValues(const SDValue *Ops, unsigned NumOps,
bool Simplify = true);
/// getMergeValues - Create a MERGE_VALUES node from the given types and ops.
/// Allowed to return something different (and simpler) if Simplify is true.
/// May be faster than the above version if VTs is known and NumOps is large.
SDValue getMergeValues(SDVTList VTs, const SDValue *Ops, unsigned NumOps,
bool Simplify = true) {
if (Simplify && NumOps == 1)
return Ops[0];
return getNode(ISD::MERGE_VALUES, VTs, Ops, NumOps);
}
SDValue getMergeValues(const SDValue *Ops, unsigned NumOps);
/// getCall - Create a CALL node from the given information.
///

6
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
View File

@ -4235,7 +4235,8 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
MVT ValueVTs[] = { LHS.getValueType(), OType };
SDValue Ops[] = { Sum, Cmp };
Result = DAG.getMergeValues(DAG.getVTList(&ValueVTs[0], 2), &Ops[0], 2);
Result = DAG.getNode(ISD::MERGE_VALUES, DAG.getVTList(&ValueVTs[0], 2),
&Ops[0], 2);
SDNode *RNode = Result.getNode();
DAG.ReplaceAllUsesOfValueWith(SDValue(Node, 0), SDValue(RNode, 0));
DAG.ReplaceAllUsesOfValueWith(SDValue(Node, 1), SDValue(RNode, 1));
@ -4264,7 +4265,8 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
MVT ValueVTs[] = { LHS.getValueType(), OType };
SDValue Ops[] = { Sum, Cmp };
Result = DAG.getMergeValues(DAG.getVTList(&ValueVTs[0], 2), &Ops[0], 2);
Result = DAG.getNode(ISD::MERGE_VALUES, DAG.getVTList(&ValueVTs[0], 2),
&Ops[0], 2);
SDNode *RNode = Result.getNode();
DAG.ReplaceAllUsesOfValueWith(SDValue(Node, 0), SDValue(RNode, 0));
DAG.ReplaceAllUsesOfValueWith(SDValue(Node, 1), SDValue(RNode, 1));

8
lib/CodeGen/SelectionDAG/SelectionDAG.cpp
View File

@ -2187,8 +2187,9 @@ SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue Operand) {
unsigned OpOpcode = Operand.getNode()->getOpcode();
switch (Opcode) {
case ISD::TokenFactor:
case ISD::MERGE_VALUES:
case ISD::CONCAT_VECTORS:
return Operand; // Factor or concat of one node? No need.
return Operand; // Factor, merge or concat of one node? No need.
case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node");
case ISD::FP_EXTEND:
assert(VT.isFloatingPoint() &&
@ -3355,9 +3356,8 @@ SDValue SelectionDAG::getAtomic(unsigned Opcode, SDValue Chain,
/// getMergeValues - Create a MERGE_VALUES node from the given operands.
/// Allowed to return something different (and simpler) if Simplify is true.
SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
bool Simplify) {
if (Simplify && NumOps == 1)
SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps) {
if (NumOps == 1)
return Ops[0];
SmallVector<MVT, 4> VTs;

30
lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
View File

@ -2158,8 +2158,9 @@ void SelectionDAGLowering::visitSelect(User &I) {
SDValue(TrueVal.getNode(), TrueVal.getResNo() + i),
SDValue(FalseVal.getNode(), FalseVal.getResNo() + i));
setValue(&I, DAG.getMergeValues(DAG.getVTList(&ValueVTs[0], NumValues),
&Values[0], NumValues));
setValue(&I, DAG.getNode(ISD::MERGE_VALUES,
DAG.getVTList(&ValueVTs[0], NumValues),
&Values[0], NumValues));
}
}
@ -2528,8 +2529,9 @@ void SelectionDAGLowering::visitInsertValue(InsertValueInst &I) {
Values[i] = IntoUndef ? DAG.getNode(ISD::UNDEF, AggValueVTs[i]) :
SDValue(Agg.getNode(), Agg.getResNo() + i);
setValue(&I, DAG.getMergeValues(DAG.getVTList(&AggValueVTs[0], NumAggValues),
&Values[0], NumAggValues));
setValue(&I, DAG.getNode(ISD::MERGE_VALUES,
DAG.getVTList(&AggValueVTs[0], NumAggValues),
&Values[0], NumAggValues));
}
void SelectionDAGLowering::visitExtractValue(ExtractValueInst &I) {
@ -2556,8 +2558,9 @@ void SelectionDAGLowering::visitExtractValue(ExtractValueInst &I) {
Agg.getNode()->getValueType(Agg.getResNo() + i)) :
SDValue(Agg.getNode(), Agg.getResNo() + i);
setValue(&I, DAG.getMergeValues(DAG.getVTList(&ValValueVTs[0], NumValValues),
&Values[0], NumValValues));
setValue(&I, DAG.getNode(ISD::MERGE_VALUES,
DAG.getVTList(&ValValueVTs[0], NumValValues),
&Values[0], NumValValues));
}
@ -2721,8 +2724,9 @@ void SelectionDAGLowering::visitLoad(LoadInst &I) {
PendingLoads.push_back(Chain);
}
setValue(&I, DAG.getMergeValues(DAG.getVTList(&ValueVTs[0], NumValues),
&Values[0], NumValues));
setValue(&I, DAG.getNode(ISD::MERGE_VALUES,
DAG.getVTList(&ValueVTs[0], NumValues),
&Values[0], NumValues));
}
@ -4544,8 +4548,9 @@ SDValue RegsForValue::getCopyFromRegs(SelectionDAG &DAG,
Parts.clear();
}
return DAG.getMergeValues(DAG.getVTList(&ValueVTs[0], ValueVTs.size()),
&Values[0], ValueVTs.size());
return DAG.getNode(ISD::MERGE_VALUES,
DAG.getVTList(&ValueVTs[0], ValueVTs.size()),
&Values[0], ValueVTs.size());
}
/// getCopyToRegs - Emit a series of CopyToReg nodes that copies the
@ -5680,8 +5685,9 @@ TargetLowering::LowerCallTo(SDValue Chain, const Type *RetTy,
AssertOp);
ReturnValues.push_back(ReturnValue);
}
Res = DAG.getMergeValues(DAG.getVTList(&RetTys[0], RetTys.size()),
&ReturnValues[0], ReturnValues.size());
Res = DAG.getNode(ISD::MERGE_VALUES,
DAG.getVTList(&RetTys[0], RetTys.size()),
&ReturnValues[0], ReturnValues.size());
}
return std::make_pair(Res, Chain);

4
lib/Target/ARM/ARMISelLowering.cpp
View File

@ -1021,8 +1021,8 @@ ARMTargetLowering::LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG) {
ArgValues.push_back(Root);
// Return the new list of results.
return DAG.getMergeValues(Op.getNode()->getVTList(), &ArgValues[0],
ArgValues.size());
return DAG.getNode(ISD::MERGE_VALUES, Op.getNode()->getVTList(),
&ArgValues[0], ArgValues.size());
}
/// isFloatingPointZero - Return true if this is +0.0.

4
lib/Target/Alpha/AlphaISelLowering.cpp
View File

@ -294,8 +294,8 @@ static SDValue LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG,
ArgValues.push_back(Root);
// Return the new list of results.
return DAG.getMergeValues(Op.getNode()->getVTList(), &ArgValues[0],
ArgValues.size());
return DAG.getNode(ISD::MERGE_VALUES, Op.getNode()->getVTList(),
&ArgValues[0], ArgValues.size());
}
static SDValue LowerRET(SDValue Op, SelectionDAG &DAG) {

4
lib/Target/CellSPU/SPUISelLowering.cpp
View File

@ -1047,8 +1047,8 @@ LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG, int &VarArgsFrameIndex)
ArgValues.push_back(Root);
// Return the new list of results.
return DAG.getMergeValues(Op.getNode()->getVTList(), &ArgValues[0],
ArgValues.size());
return DAG.getNode(ISD::MERGE_VALUES, Op.getNode()->getVTList(),
&ArgValues[0], ArgValues.size());
}
/// isLSAAddress - Return the immediate to use if the specified

8
lib/Target/Mips/MipsISelLowering.cpp
View File

@ -778,8 +778,8 @@ LowerCallResult(SDValue Chain, SDValue InFlag, CallSDNode *TheCall,
ResultVals.push_back(Chain);
// Merge everything together with a MERGE_VALUES node.
return DAG.getMergeValues(TheCall->getVTList(), &ResultVals[0],
ResultVals.size()).getNode();
return DAG.getNode(ISD::MERGE_VALUES, TheCall->getVTList(),
&ResultVals[0], ResultVals.size()).getNode();
}
//===----------------------------------------------------------------------===//
@ -921,8 +921,8 @@ LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG)
ArgValues.push_back(Root);
// Return the new list of results.
return DAG.getMergeValues(Op.getNode()->getVTList(), &ArgValues[0],
ArgValues.size()).getValue(Op.getResNo());
return DAG.getNode(ISD::MERGE_VALUES, Op.getNode()->getVTList(),
&ArgValues[0], ArgValues.size()).getValue(Op.getResNo());
}
//===----------------------------------------------------------------------===//

10
lib/Target/PowerPC/PPCISelLowering.cpp
View File

@ -1261,7 +1261,7 @@ SDValue PPCTargetLowering::LowerTRAMPOLINE(SDValue Op, SelectionDAG &DAG) {
SDValue Ops[] =
{ CallResult.first, CallResult.second };
return DAG.getMergeValues(Ops, 2, false);
return DAG.getMergeValues(Ops, 2);
}
SDValue PPCTargetLowering::LowerVASTART(SDValue Op, SelectionDAG &DAG,
@ -1825,8 +1825,8 @@ PPCTargetLowering::LowerFORMAL_ARGUMENTS(SDValue Op,
ArgValues.push_back(Root);
// Return the new list of results.
return DAG.getMergeValues(Op.getNode()->getVTList(), &ArgValues[0],
ArgValues.size());
return DAG.getNode(ISD::MERGE_VALUES, Op.getNode()->getVTList(),
&ArgValues[0], ArgValues.size());
}
/// CalculateParameterAndLinkageAreaSize - Get the size of the paramter plus
@ -2605,8 +2605,8 @@ SDValue PPCTargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG,
// Otherwise, merge everything together with a MERGE_VALUES node.
ResultVals.push_back(Chain);
SDValue Res = DAG.getMergeValues(TheCall->getVTList(), &ResultVals[0],
ResultVals.size());
SDValue Res = DAG.getNode(ISD::MERGE_VALUES, TheCall->getVTList(),
&ResultVals[0], ResultVals.size());
return Res.getValue(Op.getResNo());
}

4
lib/Target/Sparc/SparcISelLowering.cpp
View File

@ -449,8 +449,8 @@ static SDValue LowerCALL(SDValue Op, SelectionDAG &DAG) {
ResultVals.push_back(Chain);
// Merge everything together with a MERGE_VALUES node.
return DAG.getMergeValues(TheCall->getVTList(), &ResultVals[0],
ResultVals.size());
return DAG.getNode(ISD::MERGE_VALUES, TheCall->getVTList(), &ResultVals[0],
ResultVals.size());
}

8
lib/Target/X86/X86ISelLowering.cpp
View File

@ -1048,8 +1048,8 @@ LowerCallResult(SDValue Chain, SDValue InFlag, CallSDNode *TheCall,
// Merge everything together with a MERGE_VALUES node.
ResultVals.push_back(Chain);
return DAG.getMergeValues(TheCall->getVTList(), &ResultVals[0],
ResultVals.size()).getNode();
return DAG.getNode(ISD::MERGE_VALUES, TheCall->getVTList(), &ResultVals[0],
ResultVals.size()).getNode();
}
@ -1431,8 +1431,8 @@ X86TargetLowering::LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG) {
FuncInfo->setBytesToPopOnReturn(BytesToPopOnReturn);
// Return the new list of results.
return DAG.getMergeValues(Op.getNode()->getVTList(), &ArgValues[0],
ArgValues.size()).getValue(Op.getResNo());
return DAG.getNode(ISD::MERGE_VALUES, Op.getNode()->getVTList(),
&ArgValues[0], ArgValues.size()).getValue(Op.getResNo());
}
SDValue