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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-15 04:30:12 +00:00
Cleanup up LegalizeTypes handling of loads and
stores. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52620 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -415,8 +415,8 @@ void DAGTypeLegalizer::ExpandFloatResult(SDNode *N, unsigned ResNo) {
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void DAGTypeLegalizer::ExpandFloatRes_LOAD(SDNode *N, SDOperand &Lo,
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SDOperand &Hi) {
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if (ISD::isNON_EXTLoad(N)) {
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ExpandRes_NON_EXTLOAD(N, Lo, Hi);
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if (ISD::isNormalLoad(N)) {
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ExpandRes_NormalLoad(N, Lo, Hi);
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return;
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}
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@ -502,8 +502,8 @@ bool DAGTypeLegalizer::ExpandFloatOperand(SDNode *N, unsigned OpNo) {
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}
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SDOperand DAGTypeLegalizer::ExpandFloatOp_STORE(SDNode *N, unsigned OpNo) {
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if (ISD::isNON_TRUNCStore(N))
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return ExpandOp_NON_TRUNCStore(N, OpNo);
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if (ISD::isNormalStore(N))
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return ExpandOp_NormalStore(N, OpNo);
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assert(ISD::isUNINDEXEDStore(N) && "Indexed store during type legalization!");
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assert(OpNo == 1 && "Can only expand the stored value so far");
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@ -192,7 +192,7 @@ SDOperand DAGTypeLegalizer::PromoteIntRes_SETCC(SDNode *N) {
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}
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SDOperand DAGTypeLegalizer::PromoteIntRes_LOAD(LoadSDNode *N) {
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// FIXME: Add support for indexed loads.
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assert(ISD::isUNINDEXEDLoad(N) && "Indexed load during type legalization!");
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MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
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ISD::LoadExtType ExtType =
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ISD::isNON_EXTLoad(N) ? ISD::EXTLOAD : N->getExtensionType();
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@ -636,7 +636,7 @@ void DAGTypeLegalizer::PromoteSetCCOperands(SDOperand &NewLHS,SDOperand &NewRHS,
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}
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SDOperand DAGTypeLegalizer::PromoteIntOp_STORE(StoreSDNode *N, unsigned OpNo){
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// FIXME: Add support for indexed stores.
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assert(ISD::isUNINDEXEDStore(N) && "Indexed store during type legalization!");
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SDOperand Ch = N->getChain(), Ptr = N->getBasePtr();
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int SVOffset = N->getSrcValueOffset();
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unsigned Alignment = N->getAlignment();
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@ -1000,8 +1000,8 @@ void DAGTypeLegalizer::ExpandIntRes_FP_TO_UINT(SDNode *N, SDOperand &Lo,
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void DAGTypeLegalizer::ExpandIntRes_LOAD(LoadSDNode *N,
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SDOperand &Lo, SDOperand &Hi) {
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if (ISD::isNON_EXTLoad(N)) {
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ExpandRes_NON_EXTLOAD(N, Lo, Hi);
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if (ISD::isNormalLoad(N)) {
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ExpandRes_NormalLoad(N, Lo, Hi);
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return;
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}
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@ -1860,8 +1860,8 @@ void DAGTypeLegalizer::ExpandSetCCOperands(SDOperand &NewLHS, SDOperand &NewRHS,
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}
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SDOperand DAGTypeLegalizer::ExpandIntOp_STORE(StoreSDNode *N, unsigned OpNo) {
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if (ISD::isNON_TRUNCStore(N))
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return ExpandOp_NON_TRUNCStore(N, OpNo);
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if (ISD::isNormalStore(N))
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return ExpandOp_NormalStore(N, OpNo);
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assert(ISD::isUNINDEXEDStore(N) && "Indexed store during type legalization!");
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assert(OpNo == 1 && "Can only expand the stored value so far");
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@ -465,13 +465,13 @@ private:
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void ExpandRes_BIT_CONVERT (SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandRes_BUILD_PAIR (SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandRes_EXTRACT_VECTOR_ELT(SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandRes_NON_EXTLOAD (SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandRes_NormalLoad (SDNode *N, SDOperand &Lo, SDOperand &Hi);
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// Generic Operand Expansion.
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SDOperand ExpandOp_BIT_CONVERT (SDNode *N);
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SDOperand ExpandOp_BUILD_VECTOR (SDNode *N);
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SDOperand ExpandOp_EXTRACT_ELEMENT(SDNode *N);
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SDOperand ExpandOp_NON_TRUNCStore (SDNode *N, unsigned OpNo);
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SDOperand ExpandOp_NormalStore (SDNode *N, unsigned OpNo);
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};
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@ -75,7 +75,7 @@ void DAGTypeLegalizer::ExpandRes_BIT_CONVERT(SDNode *N,
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// Lower the bit-convert to a store/load from the stack, then expand the load.
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SDOperand Op = CreateStackStoreLoad(InOp, N->getValueType(0));
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ExpandRes_NON_EXTLOAD(Op.Val, Lo, Hi);
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ExpandRes_NormalLoad(Op.Val, Lo, Hi);
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}
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void DAGTypeLegalizer::ExpandRes_BUILD_PAIR(SDNode *N,
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@ -118,10 +118,9 @@ void DAGTypeLegalizer::ExpandRes_EXTRACT_VECTOR_ELT(SDNode *N,
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std::swap(Lo, Hi);
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}
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void DAGTypeLegalizer::ExpandRes_NON_EXTLOAD(SDNode *N, SDOperand &Lo,
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SDOperand &Hi) {
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assert(ISD::isNON_EXTLoad(N) && "This routine is not for extending loads!");
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assert(ISD::isUNINDEXEDLoad(N) && "Indexed load during type legalization!");
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void DAGTypeLegalizer::ExpandRes_NormalLoad(SDNode *N, SDOperand &Lo,
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SDOperand &Hi) {
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assert(ISD::isNormalLoad(N) && "This routine only for normal loads!");
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LoadSDNode *LD = cast<LoadSDNode>(N);
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MVT NVT = TLI.getTypeToTransformTo(LD->getValueType(0));
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@ -222,9 +221,8 @@ SDOperand DAGTypeLegalizer::ExpandOp_EXTRACT_ELEMENT(SDNode *N) {
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return cast<ConstantSDNode>(N->getOperand(1))->getValue() ? Hi : Lo;
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}
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SDOperand DAGTypeLegalizer::ExpandOp_NON_TRUNCStore(SDNode *N, unsigned OpNo) {
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assert(ISD::isNON_TRUNCStore(N) && "This routine not for truncating stores!");
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assert(ISD::isUNINDEXEDStore(N) && "Indexed store during type legalization!");
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SDOperand DAGTypeLegalizer::ExpandOp_NormalStore(SDNode *N, unsigned OpNo) {
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assert(ISD::isNormalStore(N) && "This routine only for normal stores!");
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assert(OpNo == 1 && "Can only expand the stored value so far");
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StoreSDNode *St = cast<StoreSDNode>(N);
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@ -100,7 +100,7 @@ SDOperand DAGTypeLegalizer::ScalarizeVecRes_UNDEF(SDNode *N) {
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}
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SDOperand DAGTypeLegalizer::ScalarizeVecRes_LOAD(LoadSDNode *N) {
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// FIXME: Add support for indexed loads.
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assert(ISD::isUNINDEXEDLoad(N) && "Indexed load during type legalization!");
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SDOperand Result = DAG.getLoad(N->getValueType(0).getVectorElementType(),
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N->getChain(), N->getBasePtr(),
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N->getSrcValue(), N->getSrcValueOffset(),
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@ -232,7 +232,7 @@ SDOperand DAGTypeLegalizer::ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
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/// ScalarizeVecOp_STORE - If the value to store is a vector that needs to be
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/// scalarized, it must be <1 x ty>. Just store the element.
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SDOperand DAGTypeLegalizer::ScalarizeVecOp_STORE(StoreSDNode *N, unsigned OpNo){
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// FIXME: Add support for indexed stores.
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assert(ISD::isUNINDEXEDStore(N) && "Indexed store during type legalization!");
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assert(OpNo == 1 && "Do not know how to scalarize this operand!");
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return DAG.getStore(N->getChain(), GetScalarizedVector(N->getOperand(1)),
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N->getBasePtr(), N->getSrcValue(), N->getSrcValueOffset(),
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@ -328,7 +328,7 @@ void DAGTypeLegalizer::SplitResult(SDNode *N, unsigned ResNo) {
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void DAGTypeLegalizer::SplitVecRes_LOAD(LoadSDNode *LD, SDOperand &Lo,
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SDOperand &Hi) {
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// FIXME: Add support for indexed loads.
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assert(ISD::isUNINDEXEDLoad(LD) && "Indexed load during type legalization!");
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MVT LoVT, HiVT;
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GetSplitDestVTs(LD->getValueType(0), LoVT, HiVT);
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@ -622,7 +622,7 @@ bool DAGTypeLegalizer::SplitOperand(SDNode *N, unsigned OpNo) {
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}
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SDOperand DAGTypeLegalizer::SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo) {
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// FIXME: Add support for indexed stores.
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assert(ISD::isUNINDEXEDStore(N) && "Indexed store during type legalization!");
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assert(OpNo == 1 && "Can only split the stored value");
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SDOperand Ch = N->getChain();
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