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R600/SI: Add patterns for v_cvt_{flr|rpi}_i32_f32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226230 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matt Arsenault
parent
909dd28c54
commit
ab2315014e
@ -438,6 +438,11 @@ def FP_ONE : PatLeaf <
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[{return N->isExactlyValue(1.0);}]
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>;
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def FP_HALF : PatLeaf <
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(fpimm),
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[{return N->isExactlyValue(0.5);}]
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>;
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let isCodeGenOnly = 1, isPseudo = 1 in {
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let usesCustomInserter = 1 in {
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@ -603,6 +608,18 @@ class ROTRPattern <Instruction BIT_ALIGN> : Pat <
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// 24-bit arithmetic patterns
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def umul24 : PatFrag <(ops node:$x, node:$y), (mul node:$x, node:$y)>;
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// Special conversion patterns
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def cvt_rpi_i32_f32 : PatFrag <
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(ops node:$src),
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(fp_to_sint (ffloor (fadd $src, FP_HALF)))
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>;
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def cvt_flr_i32_f32 : PatFrag <
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(ops node:$src),
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(fp_to_sint (ffloor $src))
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>;
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/*
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class UMUL24Pattern <Instruction UMUL24> : Pat <
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(mul U24:$x, U24:$y),
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@ -1230,8 +1230,10 @@ defm V_CVT_F16_F32 : VOP1Inst <vop1<0xa>, "v_cvt_f16_f32",
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defm V_CVT_F32_F16 : VOP1Inst <vop1<0xb>, "v_cvt_f32_f16",
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VOP_F32_I32, f16_to_fp
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>;
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//defm V_CVT_RPI_I32_F32 : VOP1_32 <0x0000000c, "v_cvt_rpi_i32_f32", []>;
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//defm V_CVT_FLR_I32_F32 : VOP1_32 <0x0000000d, "v_cvt_flr_i32_f32", []>;
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defm V_CVT_RPI_I32_F32 : VOP1Inst <vop1<0xc>, "v_cvt_rpi_i32_f32",
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VOP_I32_F32, cvt_rpi_i32_f32>;
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defm V_CVT_FLR_I32_F32 : VOP1Inst <vop1<0xd>, "v_cvt_flr_i32_f32",
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VOP_I32_F32, cvt_flr_i32_f32>;
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//defm V_CVT_OFF_F32_I4 : VOP1_32 <0x0000000e, "v_cvt_off_f32_i4", []>;
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defm V_CVT_F32_F64 : VOP1Inst <vop1<0xf>, "v_cvt_f32_f64",
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VOP_F32_F64, fround
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79
test/CodeGen/R600/cvt_flr_i32_f32.ll
Normal file
79
test/CodeGen/R600/cvt_flr_i32_f32.ll
Normal file
@ -0,0 +1,79 @@
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; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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declare float @llvm.fabs.f32(float) #1
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declare float @llvm.floor.f32(float) #1
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; FUNC-LABEL: {{^}}cvt_flr_i32_f32_0:
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; SI-NOT: add
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; SI: v_cvt_flr_i32_f32_e32 v{{[0-9]+}}, s{{[0-9]+}}
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; SI: s_endpgm
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define void @cvt_flr_i32_f32_0(i32 addrspace(1)* %out, float %x) #0 {
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%floor = call float @llvm.floor.f32(float %x) #1
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%cvt = fptosi float %floor to i32
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store i32 %cvt, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}cvt_flr_i32_f32_1:
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; SI: v_add_f32_e64 [[TMP:v[0-9]+]], 1.0, s{{[0-9]+}}
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; SI: v_cvt_flr_i32_f32_e32 v{{[0-9]+}}, [[TMP]]
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; SI: s_endpgm
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define void @cvt_flr_i32_f32_1(i32 addrspace(1)* %out, float %x) #0 {
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%fadd = fadd float %x, 1.0
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%floor = call float @llvm.floor.f32(float %fadd) #1
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%cvt = fptosi float %floor to i32
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store i32 %cvt, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}cvt_flr_i32_f32_fabs:
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; SI-NOT: add
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; SI: v_cvt_flr_i32_f32_e64 v{{[0-9]+}}, |s{{[0-9]+}}|
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; SI: s_endpgm
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define void @cvt_flr_i32_f32_fabs(i32 addrspace(1)* %out, float %x) #0 {
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%x.fabs = call float @llvm.fabs.f32(float %x) #1
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%floor = call float @llvm.floor.f32(float %x.fabs) #1
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%cvt = fptosi float %floor to i32
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store i32 %cvt, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}cvt_flr_i32_f32_fneg:
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; SI-NOT: add
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; SI: v_cvt_flr_i32_f32_e64 v{{[0-9]+}}, -s{{[0-9]+}}
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; SI: s_endpgm
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define void @cvt_flr_i32_f32_fneg(i32 addrspace(1)* %out, float %x) #0 {
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%x.fneg = fsub float -0.000000e+00, %x
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%floor = call float @llvm.floor.f32(float %x.fneg) #1
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%cvt = fptosi float %floor to i32
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store i32 %cvt, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}cvt_flr_i32_f32_fabs_fneg:
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; SI-NOT: add
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; SI: v_cvt_flr_i32_f32_e64 v{{[0-9]+}}, -|s{{[0-9]+}}|
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; SI: s_endpgm
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define void @cvt_flr_i32_f32_fabs_fneg(i32 addrspace(1)* %out, float %x) #0 {
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%x.fabs = call float @llvm.fabs.f32(float %x) #1
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%x.fabs.fneg = fsub float -0.000000e+00, %x.fabs
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%floor = call float @llvm.floor.f32(float %x.fabs.fneg) #1
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%cvt = fptosi float %floor to i32
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store i32 %cvt, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}no_cvt_flr_i32_f32_0:
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; SI-NOT: v_cvt_flr_i32_f32
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; SI: v_floor_f32
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; SI: v_cvt_u32_f32_e32
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; SI: s_endpgm
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define void @no_cvt_flr_i32_f32_0(i32 addrspace(1)* %out, float %x) #0 {
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%floor = call float @llvm.floor.f32(float %x) #1
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%cvt = fptoui float %floor to i32
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store i32 %cvt, i32 addrspace(1)* %out
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ret void
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}
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attributes #0 = { nounwind }
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attributes #1 = { nounwind readnone }
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76
test/CodeGen/R600/cvt_rpi_i32_f32.ll
Normal file
76
test/CodeGen/R600/cvt_rpi_i32_f32.ll
Normal file
@ -0,0 +1,76 @@
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; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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declare float @llvm.fabs.f32(float) #1
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declare float @llvm.floor.f32(float) #1
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; FUNC-LABEL: {{^}}cvt_rpi_i32_f32:
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; SI: v_cvt_rpi_i32_f32_e32 v{{[0-9]+}}, s{{[0-9]+}}
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; SI: s_endpgm
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define void @cvt_rpi_i32_f32(i32 addrspace(1)* %out, float %x) #0 {
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%fadd = fadd float %x, 0.5
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%floor = call float @llvm.floor.f32(float %fadd) #1
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%cvt = fptosi float %floor to i32
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store i32 %cvt, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}cvt_rpi_i32_f32_fabs:
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; SI: v_cvt_rpi_i32_f32_e64 v{{[0-9]+}}, |s{{[0-9]+}}|{{$}}
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; SI: s_endpgm
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define void @cvt_rpi_i32_f32_fabs(i32 addrspace(1)* %out, float %x) #0 {
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%x.fabs = call float @llvm.fabs.f32(float %x) #1
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%fadd = fadd float %x.fabs, 0.5
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%floor = call float @llvm.floor.f32(float %fadd) #1
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%cvt = fptosi float %floor to i32
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store i32 %cvt, i32 addrspace(1)* %out
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ret void
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}
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; FIXME: This doesn't work because it forms fsub 0.5, x
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; FUNC-LABEL: {{^}}cvt_rpi_i32_f32_fneg:
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; XSI: v_cvt_rpi_i32_f32_e64 v{{[0-9]+}}, -s{{[0-9]+}}
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; SI: v_sub_f32_e64 [[TMP:v[0-9]+]], 0.5, s{{[0-9]+}}
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; SI: v_cvt_flr_i32_f32_e32 {{v[0-9]+}}, [[TMP]]
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; SI: s_endpgm
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define void @cvt_rpi_i32_f32_fneg(i32 addrspace(1)* %out, float %x) #0 {
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%x.fneg = fsub float -0.000000e+00, %x
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%fadd = fadd float %x.fneg, 0.5
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%floor = call float @llvm.floor.f32(float %fadd) #1
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%cvt = fptosi float %floor to i32
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store i32 %cvt, i32 addrspace(1)* %out
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ret void
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}
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; FIXME: This doesn't work for same reason as above
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; FUNC-LABEL: {{^}}cvt_rpi_i32_f32_fabs_fneg:
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; XSI: v_cvt_rpi_i32_f32_e64 v{{[0-9]+}}, -|s{{[0-9]+}}|
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; SI: v_sub_f32_e64 [[TMP:v[0-9]+]], 0.5, |s{{[0-9]+}}|
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; SI: v_cvt_flr_i32_f32_e32 {{v[0-9]+}}, [[TMP]]
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; SI: s_endpgm
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define void @cvt_rpi_i32_f32_fabs_fneg(i32 addrspace(1)* %out, float %x) #0 {
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%x.fabs = call float @llvm.fabs.f32(float %x) #1
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%x.fabs.fneg = fsub float -0.000000e+00, %x.fabs
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%fadd = fadd float %x.fabs.fneg, 0.5
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%floor = call float @llvm.floor.f32(float %fadd) #1
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%cvt = fptosi float %floor to i32
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store i32 %cvt, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}no_cvt_rpi_i32_f32_0:
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; SI-NOT: v_cvt_rpi_i32_f32
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; SI: v_add_f32
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; SI: v_floor_f32
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; SI: v_cvt_u32_f32
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; SI: s_endpgm
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define void @no_cvt_rpi_i32_f32_0(i32 addrspace(1)* %out, float %x) #0 {
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%fadd = fadd float %x, 0.5
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%floor = call float @llvm.floor.f32(float %fadd) #1
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%cvt = fptoui float %floor to i32
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store i32 %cvt, i32 addrspace(1)* %out
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ret void
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}
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attributes #0 = { nounwind }
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attributes #1 = { nounwind readnone }
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