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MS inline asm: Use memory constraints for functions instead of registers
This is consistent with how we parse them in a standalone .s file, and inline assembly shouldn't differ. This fixes errors about requiring more registers than available in cases like this: void f(); void __declspec(naked) g() { __asm pusha __asm call f __asm popa __asm ret } There are no registers available to pass the address of 'f' into the asm blob. The asm should now directly call 'f'. Tests will land in Clang shortly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214550 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -731,6 +731,13 @@ private:
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(X86::Mode64Bit | X86::Mode32Bit | X86::Mode16Bit)));
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}
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unsigned getPointerWidth() {
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if (is16BitMode()) return 16;
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if (is32BitMode()) return 32;
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if (is64BitMode()) return 64;
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llvm_unreachable("invalid mode");
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}
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bool isParsingIntelSyntax() {
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return getParser().getAssemblerDialect();
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}
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@ -982,15 +989,20 @@ std::unique_ptr<X86Operand> X86AsmParser::CreateMemForInlineAsm(
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unsigned SegReg, const MCExpr *Disp, unsigned BaseReg, unsigned IndexReg,
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unsigned Scale, SMLoc Start, SMLoc End, unsigned Size, StringRef Identifier,
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InlineAsmIdentifierInfo &Info) {
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// If this is not a VarDecl then assume it is a FuncDecl or some other label
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// reference. We need an 'r' constraint here, so we need to create register
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// operand to ensure proper matching. Just pick a GPR based on the size of
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// a pointer.
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if (isa<MCSymbolRefExpr>(Disp) && !Info.IsVarDecl) {
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unsigned RegNo =
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is64BitMode() ? X86::RBX : (is32BitMode() ? X86::EBX : X86::BX);
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return X86Operand::CreateReg(RegNo, Start, End, /*AddressOf=*/true,
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SMLoc(), Identifier, Info.OpDecl);
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// If we found a decl other than a VarDecl, then assume it is a FuncDecl or
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// some other label reference.
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if (isa<MCSymbolRefExpr>(Disp) && Info.OpDecl && !Info.IsVarDecl) {
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// Insert an explicit size if the user didn't have one.
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if (!Size) {
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Size = getPointerWidth();
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InstInfo->AsmRewrites->push_back(AsmRewrite(AOK_SizeDirective, Start,
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/*Len=*/0, Size));
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}
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// Create an absolute memory reference in order to match against
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// instructions taking a PC relative operand.
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return X86Operand::CreateMem(Disp, Start, End, Size, Identifier,
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Info.OpDecl);
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}
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// We either have a direct symbol reference, or an offset from a symbol. The
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@ -110,7 +110,7 @@ define i32 @t31() {
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entry:
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%val = alloca i32, align 64
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store i32 -1, i32* %val, align 64
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call void asm sideeffect inteldialect "mov dword ptr $0, esp", "=*m,~{dirflag},~{fpsr},~{flags}"(i32* %val) #1
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call void asm sideeffect inteldialect "mov dword ptr $0, esp", "=*m,~{dirflag},~{fpsr},~{flags}"(i32* %val)
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%sp = load i32* %val, align 64
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ret i32 %sp
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; CHECK-LABEL: t31:
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@ -125,3 +125,12 @@ entry:
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; CHECK: movl (%esp), %eax
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; CHECK: ret
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}
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declare void @other_func()
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define void @naked() #0 {
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call void asm sideeffect inteldialect "call dword ptr $0", "*m,~{eax},~{ebx},~{ecx},~{edx},~{edi},~{esi},~{esp},~{ebp},~{dirflag},~{fpsr},~{flags}"(void()* @other_func)
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unreachable
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}
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attributes #0 = { naked }
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