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Optimize redundant sign extends and negation of predicates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150606 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -517,8 +517,8 @@ bool HexagonHardwareLoops::convertToHardwareLoop(MachineLoop *L) {
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// The loop ends with either:
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// - a conditional branch followed by an unconditional branch, or
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// - a conditional branch to the loop start.
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if (LastI->getOpcode() == Hexagon::JMP_Pred ||
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LastI->getOpcode() == Hexagon::JMP_PredNot) {
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if (LastI->getOpcode() == Hexagon::JMP_c ||
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LastI->getOpcode() == Hexagon::JMP_cNot) {
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// delete one and change/add an uncond. branch to out of the loop
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MachineBasicBlock *BranchTarget = LastI->getOperand(1).getMBB();
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LastI = LastMBB->erase(LastI);
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