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Pass in a value type to getRegForInlineAsmConstraint, allowing targets to

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select different sets of registers depending on the type requested.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26304 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2006-02-21 23:10:29 +00:00
parent 4e4c71e423
commit aba3b13fb3
1 changed files with 2 additions and 1 deletions
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3
include/llvm/Target/TargetLowering.h
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@ -496,7 +496,8 @@ public:
/// satisfy the constraint. This should only be used for physregs and
/// C_RegisterClass constraints.
virtual std::vector<unsigned>
getRegForInlineAsmConstraint(const std::string &Constraint) const;
getRegForInlineAsmConstraint(const std::string &Constraint,
MVT::ValueType VT) const;
/// isOperandValidForConstraint - Return true if the specified SDOperand is
/// valid for the specified target constraint letter.