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[mips][microMIPS] Fix issue with 16b instructions in jr instruction delay slot
16 bit instructions are not allowed in jr delay slot. Same stands for PseudoIndirectBranch and PseudoReturn. Differential Revision: http://reviews.llvm.org/D6815 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225798 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -210,7 +210,7 @@ namespace {
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template<typename IterTy>
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template<typename IterTy>
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bool searchRange(MachineBasicBlock &MBB, IterTy Begin, IterTy End,
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bool searchRange(MachineBasicBlock &MBB, IterTy Begin, IterTy End,
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RegDefsUses &RegDU, InspectMemInstr &IM,
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RegDefsUses &RegDU, InspectMemInstr &IM,
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IterTy &Filler) const;
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IterTy &Filler, Iter Slot) const;
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/// This function searches in the backward direction for an instruction that
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/// This function searches in the backward direction for an instruction that
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/// can be moved to the delay slot. Returns true on success.
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/// can be moved to the delay slot. Returns true on success.
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@ -612,7 +612,7 @@ FunctionPass *llvm::createMipsDelaySlotFillerPass(MipsTargetMachine &tm) {
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template<typename IterTy>
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template<typename IterTy>
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bool Filler::searchRange(MachineBasicBlock &MBB, IterTy Begin, IterTy End,
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bool Filler::searchRange(MachineBasicBlock &MBB, IterTy Begin, IterTy End,
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RegDefsUses &RegDU, InspectMemInstr& IM,
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RegDefsUses &RegDU, InspectMemInstr& IM,
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IterTy &Filler) const {
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IterTy &Filler, Iter Slot) const {
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for (IterTy I = Begin; I != End; ++I) {
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for (IterTy I = Begin; I != End; ++I) {
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// skip debug value
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// skip debug value
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if (I->isDebugValue())
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if (I->isDebugValue())
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@ -640,6 +640,15 @@ bool Filler::searchRange(MachineBasicBlock &MBB, IterTy Begin, IterTy End,
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continue;
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continue;
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}
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}
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bool InMicroMipsMode = TM.getSubtarget<MipsSubtarget>().inMicroMipsMode();
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const MipsInstrInfo *TII = static_cast<const MipsInstrInfo *>(
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TM.getSubtargetImpl()->getInstrInfo());
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unsigned Opcode = (*Slot).getOpcode();
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if (InMicroMipsMode && TII->GetInstSizeInBytes(&(*I)) == 2 &&
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(Opcode == Mips::JR || Opcode == Mips::PseudoIndirectBranch ||
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Opcode == Mips::PseudoReturn))
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continue;
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Filler = I;
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Filler = I;
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return true;
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return true;
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}
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}
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@ -657,7 +666,8 @@ bool Filler::searchBackward(MachineBasicBlock &MBB, Iter Slot) const {
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RegDU.init(*Slot);
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RegDU.init(*Slot);
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if (!searchRange(MBB, ReverseIter(Slot), MBB.rend(), RegDU, MemDU, Filler))
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if (!searchRange(MBB, ReverseIter(Slot), MBB.rend(), RegDU, MemDU, Filler,
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Slot))
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return false;
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return false;
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MBB.splice(std::next(Slot), &MBB, std::next(Filler).base());
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MBB.splice(std::next(Slot), &MBB, std::next(Filler).base());
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@ -677,7 +687,7 @@ bool Filler::searchForward(MachineBasicBlock &MBB, Iter Slot) const {
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RegDU.setCallerSaved(*Slot);
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RegDU.setCallerSaved(*Slot);
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if (!searchRange(MBB, std::next(Slot), MBB.end(), RegDU, NM, Filler))
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if (!searchRange(MBB, std::next(Slot), MBB.end(), RegDU, NM, Filler, Slot))
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return false;
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return false;
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MBB.splice(std::next(Slot), &MBB, Filler);
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MBB.splice(std::next(Slot), &MBB, Filler);
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@ -720,7 +730,8 @@ bool Filler::searchSuccBBs(MachineBasicBlock &MBB, Iter Slot) const {
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IM.reset(new MemDefsUses(MFI));
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IM.reset(new MemDefsUses(MFI));
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}
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}
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if (!searchRange(MBB, SuccBB->begin(), SuccBB->end(), RegDU, *IM, Filler))
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if (!searchRange(MBB, SuccBB->begin(), SuccBB->end(), RegDU, *IM, Filler,
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Slot))
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return false;
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return false;
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insertDelayFiller(Filler, BrMap);
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insertDelayFiller(Filler, BrMap);
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48
test/CodeGen/Mips/micromips-delay-slot-jr.ll
Normal file
48
test/CodeGen/Mips/micromips-delay-slot-jr.ll
Normal file
@ -0,0 +1,48 @@
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; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=+micromips \
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; RUN: -relocation-model=static -O2 < %s | FileCheck %s
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@main.L = internal unnamed_addr constant [3 x i8*] [i8* blockaddress(@main, %L1), i8* blockaddress(@main, %L2), i8* null], align 4
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@str = private unnamed_addr constant [2 x i8] c"A\00"
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@str2 = private unnamed_addr constant [2 x i8] c"B\00"
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define i32 @main() #0 {
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entry:
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br label %L1
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L1: ; preds = %entry, %L1
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%i.0 = phi i32 [ 0, %entry ], [ %inc, %L1 ]
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%puts = tail call i32 @puts(i8* getelementptr inbounds ([2 x i8]* @str, i32 0, i32 0))
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%inc = add i32 %i.0, 1
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%arrayidx = getelementptr inbounds [3 x i8*]* @main.L, i32 0, i32 %i.0
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%0 = load i8** %arrayidx, align 4, !tbaa !1
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indirectbr i8* %0, [label %L1, label %L2]
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L2: ; preds = %L1
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%puts2 = tail call i32 @puts(i8* getelementptr inbounds ([2 x i8]* @str2, i32 0, i32 0))
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ret i32 0
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}
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declare i32 @puts(i8* nocapture readonly) #1
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!1 = !{!2, !2, i64 0}
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!2 = !{!"any pointer", !3, i64 0}
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!3 = !{!"omnipotent char", !4, i64 0}
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!4 = !{!"Simple C/C++ TBAA"}
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; CHECK: jr
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; CHECK-NEXT: nop
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%struct.foostruct = type { [3 x float] }
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%struct.barstruct = type { %struct.foostruct, float }
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@bar_ary = common global [4 x %struct.barstruct] zeroinitializer, align 4
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define float* @spooky(i32 signext %i) #0 {
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%safe = getelementptr inbounds [4 x %struct.barstruct]* @bar_ary, i32 0, i32 %i, i32 1
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store float 1.420000e+02, float* %safe, align 4, !tbaa !1
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ret float* %safe
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}
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; CHECK: spooky:
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; CHECK: jr $ra
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; CHECK-NEXT: nop
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