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https://github.com/c64scene-ar/llvm-6502.git
synced 2025-07-25 13:24:46 +00:00
add some long-overdue enums to refer to the parts of the 5-operand
X86 memory operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107925 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -863,7 +863,7 @@ unsigned X86InstrInfo::isStoreToStackSlot(const MachineInstr *MI,
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int &FrameIndex) const {
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if (isFrameStoreOpcode(MI->getOpcode()))
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if (isFrameOperand(MI, 0, FrameIndex))
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return MI->getOperand(X86AddrNumOperands).getReg();
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return MI->getOperand(X86::AddrNumOperands).getReg();
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return 0;
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}
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@@ -2616,7 +2616,7 @@ MachineInstr* X86InstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
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} else if (Ops.size() != 1)
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return NULL;
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SmallVector<MachineOperand,X86AddrNumOperands> MOs;
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SmallVector<MachineOperand,X86::AddrNumOperands> MOs;
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switch (LoadMI->getOpcode()) {
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case X86::V_SET0PS:
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case X86::V_SET0PD:
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@@ -2670,7 +2670,7 @@ MachineInstr* X86InstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
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default: {
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// Folding a normal load. Just copy the load's address operands.
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unsigned NumOps = LoadMI->getDesc().getNumOperands();
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for (unsigned i = NumOps - X86AddrNumOperands; i != NumOps; ++i)
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for (unsigned i = NumOps - X86::AddrNumOperands; i != NumOps; ++i)
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MOs.push_back(LoadMI->getOperand(i));
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break;
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}
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@@ -2764,13 +2764,13 @@ bool X86InstrInfo::unfoldMemoryOperand(MachineFunction &MF, MachineInstr *MI,
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// conservatively assume the address is unaligned. That's bad for
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// performance.
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return false;
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SmallVector<MachineOperand, X86AddrNumOperands> AddrOps;
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SmallVector<MachineOperand, X86::AddrNumOperands> AddrOps;
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SmallVector<MachineOperand,2> BeforeOps;
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SmallVector<MachineOperand,2> AfterOps;
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SmallVector<MachineOperand,4> ImpOps;
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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MachineOperand &Op = MI->getOperand(i);
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if (i >= Index && i < Index + X86AddrNumOperands)
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if (i >= Index && i < Index + X86::AddrNumOperands)
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AddrOps.push_back(Op);
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else if (Op.isReg() && Op.isImplicit())
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ImpOps.push_back(Op);
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@@ -2789,7 +2789,7 @@ bool X86InstrInfo::unfoldMemoryOperand(MachineFunction &MF, MachineInstr *MI,
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loadRegFromAddr(MF, Reg, AddrOps, RC, MMOs.first, MMOs.second, NewMIs);
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if (UnfoldStore) {
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// Address operands cannot be marked isKill.
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for (unsigned i = 1; i != 1 + X86AddrNumOperands; ++i) {
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for (unsigned i = 1; i != 1 + X86::AddrNumOperands; ++i) {
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MachineOperand &MO = NewMIs[0]->getOperand(i);
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if (MO.isReg())
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MO.setIsKill(false);
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@@ -2886,7 +2886,7 @@ X86InstrInfo::unfoldMemoryOperand(SelectionDAG &DAG, SDNode *N,
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unsigned NumOps = N->getNumOperands();
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for (unsigned i = 0; i != NumOps-1; ++i) {
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SDValue Op = N->getOperand(i);
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if (i >= Index-NumDefs && i < Index-NumDefs + X86AddrNumOperands)
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if (i >= Index-NumDefs && i < Index-NumDefs + X86::AddrNumOperands)
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AddrOps.push_back(Op);
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else if (i < Index-NumDefs)
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BeforeOps.push_back(Op);
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@@ -3218,7 +3218,7 @@ unsigned X86InstrInfo::determineREX(const MachineInstr &MI) {
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case X86II::MRM4m: case X86II::MRM5m:
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case X86II::MRM6m: case X86II::MRM7m:
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case X86II::MRMDestMem: {
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unsigned e = (isTwoAddr ? X86AddrNumOperands+1 : X86AddrNumOperands);
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unsigned e = (isTwoAddr ? X86::AddrNumOperands+1 : X86::AddrNumOperands);
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i = isTwoAddr ? 1 : 0;
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if (NumOps > e && isX86_64ExtendedReg(MI.getOperand(e)))
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REX |= 1 << 2;
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@@ -3570,7 +3570,7 @@ static unsigned GetInstSizeWithDesc(const MachineInstr &MI,
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case X86II::MRMDestMem: {
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++FinalSize;
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FinalSize += getMemModRMByteSize(MI, CurOp, IsPIC, Is64BitMode);
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CurOp += X86AddrNumOperands + 1;
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CurOp += X86::AddrNumOperands + 1;
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if (CurOp != NumOps) {
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++CurOp;
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FinalSize += sizeConstant(X86II::getSizeOfImm(Desc->TSFlags));
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@@ -3592,9 +3592,9 @@ static unsigned GetInstSizeWithDesc(const MachineInstr &MI,
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int AddrOperands;
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if (Opcode == X86::LEA64r || Opcode == X86::LEA64_32r ||
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Opcode == X86::LEA16r || Opcode == X86::LEA32r)
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AddrOperands = X86AddrNumOperands - 1; // No segment register
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AddrOperands = X86::AddrNumOperands - 1; // No segment register
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else
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AddrOperands = X86AddrNumOperands;
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AddrOperands = X86::AddrNumOperands;
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++FinalSize;
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FinalSize += getMemModRMByteSize(MI, CurOp+1, IsPIC, Is64BitMode);
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@@ -3652,7 +3652,7 @@ static unsigned GetInstSizeWithDesc(const MachineInstr &MI,
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++FinalSize;
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FinalSize += getMemModRMByteSize(MI, CurOp, IsPIC, Is64BitMode);
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CurOp += X86AddrNumOperands;
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CurOp += X86::AddrNumOperands;
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if (CurOp != NumOps) {
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const MachineOperand &MO = MI.getOperand(CurOp++);
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