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Post process 'xor', 'or' and 'cmp' instructions and select better encoding, if available.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148485 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Devang Patel 2012-01-19 17:53:25 +00:00
parent 73dd8bbce3
commit ac0f048602
2 changed files with 136 additions and 0 deletions
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114
lib/Target/X86/AsmParser/X86AsmParser.cpp
View File

@ -1217,6 +1217,120 @@ processInstruction(MCInst &Inst,
Inst = TmpInst;
return true;
}
case X86::XOR16i16: {
if (!Inst.getOperand(0).isImm() ||
!isImmSExti16i8Value(Inst.getOperand(0).getImm()))
return false;
MCInst TmpInst;
TmpInst.setOpcode(X86::XOR16ri8);
TmpInst.addOperand(MCOperand::CreateReg(X86::AX));
TmpInst.addOperand(MCOperand::CreateReg(X86::AX));
TmpInst.addOperand(Inst.getOperand(0));
Inst = TmpInst;
return true;
}
case X86::XOR32i32: {
if (!Inst.getOperand(0).isImm() ||
!isImmSExti32i8Value(Inst.getOperand(0).getImm()))
return false;
MCInst TmpInst;
TmpInst.setOpcode(X86::XOR32ri8);
TmpInst.addOperand(MCOperand::CreateReg(X86::EAX));
TmpInst.addOperand(MCOperand::CreateReg(X86::EAX));
TmpInst.addOperand(Inst.getOperand(0));
Inst = TmpInst;
return true;
}
case X86::XOR64i32: {
if (!Inst.getOperand(0).isImm() ||
!isImmSExti64i8Value(Inst.getOperand(0).getImm()))
return false;
MCInst TmpInst;
TmpInst.setOpcode(X86::XOR64ri8);
TmpInst.addOperand(MCOperand::CreateReg(X86::RAX));
TmpInst.addOperand(MCOperand::CreateReg(X86::RAX));
TmpInst.addOperand(Inst.getOperand(0));
Inst = TmpInst;
return true;
}
case X86::OR16i16: {
if (!Inst.getOperand(0).isImm() ||
!isImmSExti16i8Value(Inst.getOperand(0).getImm()))
return false;
MCInst TmpInst;
TmpInst.setOpcode(X86::OR16ri8);
TmpInst.addOperand(MCOperand::CreateReg(X86::AX));
TmpInst.addOperand(MCOperand::CreateReg(X86::AX));
TmpInst.addOperand(Inst.getOperand(0));
Inst = TmpInst;
return true;
}
case X86::OR32i32: {
if (!Inst.getOperand(0).isImm() ||
!isImmSExti32i8Value(Inst.getOperand(0).getImm()))
return false;
MCInst TmpInst;
TmpInst.setOpcode(X86::OR32ri8);
TmpInst.addOperand(MCOperand::CreateReg(X86::EAX));
TmpInst.addOperand(MCOperand::CreateReg(X86::EAX));
TmpInst.addOperand(Inst.getOperand(0));
Inst = TmpInst;
return true;
}
case X86::OR64i32: {
if (!Inst.getOperand(0).isImm() ||
!isImmSExti64i8Value(Inst.getOperand(0).getImm()))
return false;
MCInst TmpInst;
TmpInst.setOpcode(X86::OR64ri8);
TmpInst.addOperand(MCOperand::CreateReg(X86::RAX));
TmpInst.addOperand(MCOperand::CreateReg(X86::RAX));
TmpInst.addOperand(Inst.getOperand(0));
Inst = TmpInst;
return true;
}
case X86::CMP16i16: {
if (!Inst.getOperand(0).isImm() ||
!isImmSExti16i8Value(Inst.getOperand(0).getImm()))
return false;
MCInst TmpInst;
TmpInst.setOpcode(X86::CMP16ri8);
TmpInst.addOperand(MCOperand::CreateReg(X86::AX));
TmpInst.addOperand(Inst.getOperand(0));
Inst = TmpInst;
return true;
}
case X86::CMP32i32: {
if (!Inst.getOperand(0).isImm() ||
!isImmSExti32i8Value(Inst.getOperand(0).getImm()))
return false;
MCInst TmpInst;
TmpInst.setOpcode(X86::CMP32ri8);
TmpInst.addOperand(MCOperand::CreateReg(X86::EAX));
TmpInst.addOperand(Inst.getOperand(0));
Inst = TmpInst;
return true;
}
case X86::CMP64i32: {
if (!Inst.getOperand(0).isImm() ||
!isImmSExti64i8Value(Inst.getOperand(0).getImm()))
return false;
MCInst TmpInst;
TmpInst.setOpcode(X86::CMP64ri8);
TmpInst.addOperand(MCOperand::CreateReg(X86::RAX));
TmpInst.addOperand(Inst.getOperand(0));
Inst = TmpInst;
return true;
}
}
return false;
}

22
test/MC/X86/intel-syntax-encoding.s Normal file
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@ -0,0 +1,22 @@
// RUN: llvm-mc -x86-asm-syntax=intel -triple x86_64-unknown-unknown --show-encoding %s | FileCheck %s
// CHECK: encoding: [0x66,0x83,0xf0,0x0c]
xor ax, 12
// CHECK: encoding: [0x83,0xf0,0x0c]
xor eax, 12
// CHECK: encoding: [0x48,0x83,0xf0,0x0c]
xor rax, 12
// CHECK: encoding: [0x66,0x83,0xc8,0x0c]
or ax, 12
// CHECK: encoding: [0x83,0xc8,0x0c]
or eax, 12
// CHECK: encoding: [0x48,0x83,0xc8,0x0c]
or rax, 12
// CHECK: encoding: [0x66,0x83,0xf8,0x0c]
cmp ax, 12
// CHECK: encoding: [0x83,0xf8,0x0c]
cmp eax, 12
// CHECK: encoding: [0x48,0x83,0xf8,0x0c]
cmp rax, 12