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Bunch of sext_inreg patterns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75964 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -422,6 +422,20 @@ def MOV64mi16 : Pseudo<(outs), (ins riaddr:$dst, i64imm:$src),
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"mvghi\t{$dst, $src}",
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"mvghi\t{$dst, $src}",
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[(store (i64 immSExt16:$src), riaddr:$dst)]>;
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[(store (i64 immSExt16:$src), riaddr:$dst)]>;
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// sexts
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def MOVSX32rr8 : Pseudo<(outs GR32:$dst), (ins GR32:$src),
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"lbr\t{$dst, $src}",
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[(set GR32:$dst, (sext_inreg GR32:$src, i8))]>;
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def MOVSX64rr8 : Pseudo<(outs GR64:$dst), (ins GR64:$src),
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"lgbr\t{$dst, $src}",
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[(set GR64:$dst, (sext_inreg GR64:$src, i8))]>;
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def MOVSX32rr16 : Pseudo<(outs GR32:$dst), (ins GR32:$src),
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"lhr\t{$dst, $src}",
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[(set GR32:$dst, (sext_inreg GR32:$src, i16))]>;
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def MOVSX64rr16 : Pseudo<(outs GR64:$dst), (ins GR64:$src),
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"lghr\t{$dst, $src}",
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[(set GR64:$dst, (sext_inreg GR64:$src, i16))]>;
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// extloads
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// extloads
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def MOVSX32rm8 : Pseudo<(outs GR32:$dst), (ins rriaddr:$src),
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def MOVSX32rm8 : Pseudo<(outs GR32:$dst), (ins rriaddr:$src),
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"lb\t{$dst, $src}",
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"lb\t{$dst, $src}",
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