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[PowerPC]Activate FeatureVSX for the Power target
This change activates FeatureVSX for Power 7 and Power 8 in PPC.td. http://reviews.llvm.org/D6570 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223709 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -104,9 +104,6 @@ def FeatureQPX : SubtargetFeature<"qpx","HasQPX", "true",
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def FeatureVSX : SubtargetFeature<"vsx","HasVSX", "true",
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"Enable VSX instructions",
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[FeatureAltivec]>;
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def FeatureP8Vector : SubtargetFeature<"power8-vector", "HasP8Vector", "true",
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"Enable POWER8 vector instructions",
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[FeatureVSX, FeatureAltivec]>;
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def DeprecatedMFTB : SubtargetFeature<"", "DeprecatedMFTB", "true",
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"Treat mftb as deprecated">;
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@ -119,6 +116,7 @@ def DeprecatedDST : SubtargetFeature<"", "DeprecatedDST", "true",
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// CMPB p6, p6x, p7 cmpb
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// DFP p6, p6x, p7 decimal floating-point instructions
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// POPCNTB p5 through p7 popcntb and related instructions
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// VSX p7 vector-scalar instruction set
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//===----------------------------------------------------------------------===//
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// ABI Selection //
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@ -303,7 +301,7 @@ def : ProcessorModel<"pwr6x", G5Model,
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FeatureFPRND, Feature64Bit,
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DeprecatedMFTB, DeprecatedDST]>;
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def : ProcessorModel<"pwr7", P7Model,
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[DirectivePwr7, FeatureAltivec,
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[DirectivePwr7, FeatureAltivec, FeatureVSX,
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FeatureMFOCRF, FeatureFCPSGN, FeatureFSqrt, FeatureFRE,
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FeatureFRES, FeatureFRSQRTE, FeatureFRSQRTES,
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FeatureRecipPrec, FeatureSTFIWX, FeatureLFIWAX,
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@ -312,7 +310,7 @@ def : ProcessorModel<"pwr7", P7Model,
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Feature64Bit /*, Feature64BitRegs */,
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DeprecatedMFTB, DeprecatedDST]>;
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def : ProcessorModel<"pwr8", P7Model /* FIXME: Update to P8Model when available */,
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[DirectivePwr8, FeatureAltivec,
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[DirectivePwr8, FeatureAltivec, FeatureVSX,
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FeatureMFOCRF, FeatureFCPSGN, FeatureFSqrt, FeatureFRE,
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FeatureFRES, FeatureFRSQRTE, FeatureFRSQRTES,
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FeatureRecipPrec, FeatureSTFIWX, FeatureLFIWAX,
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