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Run lower-switch after lower-invoke.
Only run lower-allocations and lower-select for the simple isel git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24881 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -73,28 +73,25 @@ bool SparcV8TargetMachine::addPassesToEmitFile(PassManager &PM,
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// FIXME: Implement efficient support for garbage collection intrinsics.
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PM.add(createLowerGCPass());
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// Replace malloc and free instructions with library calls.
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PM.add(createLowerAllocationsPass());
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// FIXME: implement the switch instruction in the instruction selector.
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PM.add(createLowerSwitchPass());
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// Make sure that no unreachable blocks are instruction selected.
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PM.add(createUnreachableBlockEliminationPass());
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// FIXME: implement the invoke/unwind instructions!
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PM.add(createLowerInvokePass());
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// Make sure that no unreachable blocks are instruction selected.
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PM.add(createUnreachableBlockEliminationPass());
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// FIXME: implement the select instruction in the instruction selector.
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PM.add(createLowerSelectPass());
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// FIXME: implement the switch instruction in the instruction selector.
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PM.add(createLowerSwitchPass());
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// Print LLVM code input to instruction selector:
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if (PrintMachineCode)
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PM.add(new PrintFunctionPass());
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if (DisableV8DAGDAG)
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if (DisableV8DAGDAG) {
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// Replace malloc and free instructions with library calls.
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PM.add(createLowerAllocationsPass());
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PM.add(createLowerSelectPass());
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PM.add(createSparcV8SimpleInstructionSelector(*this));
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else
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} else
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PM.add(createSparcV8ISelDag(*this));
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// Print machine instructions as they were initially generated.
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@ -110,6 +107,7 @@ bool SparcV8TargetMachine::addPassesToEmitFile(PassManager &PM,
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PM.add(createMachineFunctionPrinterPass(&std::cerr));
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PM.add(createSparcV8FPMoverPass(*this));
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PM.add(createSparcV8DelaySlotFillerPass(*this));
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// Print machine instructions after filling delay slots.
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@ -73,28 +73,25 @@ bool SparcV8TargetMachine::addPassesToEmitFile(PassManager &PM,
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// FIXME: Implement efficient support for garbage collection intrinsics.
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PM.add(createLowerGCPass());
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// Replace malloc and free instructions with library calls.
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PM.add(createLowerAllocationsPass());
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// FIXME: implement the switch instruction in the instruction selector.
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PM.add(createLowerSwitchPass());
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// Make sure that no unreachable blocks are instruction selected.
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PM.add(createUnreachableBlockEliminationPass());
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// FIXME: implement the invoke/unwind instructions!
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PM.add(createLowerInvokePass());
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// Make sure that no unreachable blocks are instruction selected.
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PM.add(createUnreachableBlockEliminationPass());
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// FIXME: implement the select instruction in the instruction selector.
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PM.add(createLowerSelectPass());
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// FIXME: implement the switch instruction in the instruction selector.
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PM.add(createLowerSwitchPass());
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// Print LLVM code input to instruction selector:
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if (PrintMachineCode)
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PM.add(new PrintFunctionPass());
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if (DisableV8DAGDAG)
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if (DisableV8DAGDAG) {
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// Replace malloc and free instructions with library calls.
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PM.add(createLowerAllocationsPass());
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PM.add(createLowerSelectPass());
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PM.add(createSparcV8SimpleInstructionSelector(*this));
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else
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} else
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PM.add(createSparcV8ISelDag(*this));
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// Print machine instructions as they were initially generated.
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@ -110,6 +107,7 @@ bool SparcV8TargetMachine::addPassesToEmitFile(PassManager &PM,
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PM.add(createMachineFunctionPrinterPass(&std::cerr));
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PM.add(createSparcV8FPMoverPass(*this));
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PM.add(createSparcV8DelaySlotFillerPass(*this));
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// Print machine instructions after filling delay slots.
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