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Enabling thumb2 mode used to force support for armv6t2. Replace this

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with a temporary assertion and adjust the various test cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197224 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Joerg Sonnenberger 2013-12-13 11:16:00 +00:00
parent b90ed644fc
commit aca2998f14
82 changed files with 99 additions and 93 deletions
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7
lib/Target/ARM/ARMSubtarget.cpp
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@ -179,10 +179,9 @@ void ARMSubtarget::resetSubtargetFeatures(StringRef CPU, StringRef FS) {
}
ParseSubtargetFeatures(CPUString, ArchFS);
// Thumb2 implies at least V6T2. FIXME: Fix tests to explicitly specify a
// ARM version or CPU and then remove this.
if (!HasV6T2Ops && hasThumb2())
HasV4TOps = HasV5TOps = HasV5TEOps = HasV6Ops = HasV6MOps = HasV6T2Ops = true;
// FIXME: This used enable V6T2 support implicitly for Thumb2 mode.
// Assert this for now to make the change obvious.
assert(hasV6T2Ops() || !hasThumb2());
// Keep a pointer to static instruction cost data for the specified CPU.
SchedModel = getSchedModelForCPU(CPUString);

3
test/CodeGen/ARM/arm-and-tst-peephole.ll
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@ -1,6 +1,7 @@
; RUN: llc < %s -march=arm | FileCheck -check-prefix=ARM %s
; RUN: llc < %s -march=thumb | FileCheck -check-prefix=THUMB %s
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck -check-prefix=T2 %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 \
; RUN: | FileCheck -check-prefix=T2 %s
; RUN: llc < %s -mtriple=thumbv8 | FileCheck -check-prefix=V8 %s
; FIXME: The -march=thumb test doesn't change if -disable-peephole is specified.

2
test/CodeGen/ARM/movt.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=arm -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=arm -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; rdar://7317664
define i32 @t(i32 %X) nounwind {

6
test/CodeGen/ARM/select-imm.ll
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@ -1,6 +1,8 @@
; RUN: llc < %s -march=arm | FileCheck %s --check-prefix=ARM
; RUN: llc < %s -march=arm -mattr=+thumb2 | FileCheck %s --check-prefix=ARMT2
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s --check-prefix=THUMB2
; RUN: llc < %s -march=arm -mcpu=arm1156t2-s -mattr=+thumb2 | \
; RUN: FileCheck %s --check-prefix=ARMT2
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | \
; RUN: FileCheck %s --check-prefix=THUMB2
define i32 @t1(i32 %c) nounwind readnone {
entry:

2
test/CodeGen/ARM/t2-imm.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i32 @f6(i32 %a) {
; CHECK:f6

2
test/CodeGen/ARM/thumb2-it-block.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -mtriple=thumbv8 | FileCheck %s
; PR11107

2
test/CodeGen/Thumb2/bfx.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i32 @sbfx1(i32 %a) {
; CHECK: sbfx1

2
test/CodeGen/Thumb2/carry.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i64 @f1(i64 %a, i64 %b) {
entry:

2
test/CodeGen/Thumb2/div.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -mtriple=thumb-apple-darwin -mattr=+thumb2 \
; RUN: llc < %s -mtriple=thumb-apple-darwin -mcpu=arm1156t2-s -mattr=+thumb2 \
; RUN: | FileCheck %s -check-prefix=CHECK-THUMB
; RUN: llc < %s -march=thumb -mcpu=cortex-m3 -mattr=+thumb2 \
; RUN: | FileCheck %s -check-prefix=CHECK-THUMBV7M

6
test/CodeGen/Thumb2/large-stack.ll
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@ -1,5 +1,7 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 -mtriple=arm-apple-darwin | FileCheck %s -check-prefix=DARWIN
; RUN: llc < %s -march=thumb -mattr=+thumb2 -mtriple=arm-linux-gnueabi | FileCheck %s -check-prefix=LINUX
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 \
; RUN: -mtriple=arm-apple-darwin | FileCheck %s -check-prefix=DARWIN
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 \
; RUN: -mtriple=arm-linux-gnueabi | FileCheck %s -check-prefix=LINUX
define void @test1() {
; DARWIN-LABEL: test1:

2
test/CodeGen/Thumb2/longMACt.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; Check generated signed and unsigned multiply accumulate long.
define i64 @MACLongTest1(i32 %a, i32 %b, i64 %c) {

2
test/CodeGen/Thumb2/mul_const.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; rdar://7069502
define i32 @t1(i32 %v) nounwind readnone {

2
test/CodeGen/Thumb2/thumb2-adc.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; 734439407618 = 0x000000ab00000002
define i64 @f1(i64 %a) {

2
test/CodeGen/Thumb2/thumb2-add.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i32 @t2ADDrc_255(i32 %lhs) {
; CHECK-LABEL: t2ADDrc_255:

2
test/CodeGen/Thumb2/thumb2-add2.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; 171 = 0x000000ab
define i32 @f1(i32 %a) {

2
test/CodeGen/Thumb2/thumb2-add3.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a) {
%tmp = add i32 %a, 4095

2
test/CodeGen/Thumb2/thumb2-add4.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; 171 = 0x000000ab
define i64 @f1(i64 %a) {

2
test/CodeGen/Thumb2/thumb2-add5.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a, i32 %b) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-add6.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i64 @f1(i64 %a, i64 %b) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-and.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a, i32 %b) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-and2.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; 171 = 0x000000ab
define i32 @f1(i32 %a) {

2
test/CodeGen/Thumb2/thumb2-asr.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a, i32 %b) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-asr2.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-bcc.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; If-conversion defeats the purpose of this test, which is to check CBZ
; generation, so use memory barrier instruction to make sure it doesn't
; happen and we get actual branches.

2
test/CodeGen/Thumb2/thumb2-bfc.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; 4278190095 = 0xff00000f
define i32 @f1(i32 %a) {

2
test/CodeGen/Thumb2/thumb2-bic.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a, i32 %b) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-clz.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2,+v7 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2,+v7 | FileCheck %s
define i32 @f1(i32 %a) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-cmn.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; These tests could be improved by 'movs r0, #0' being rematerialized below the
; test as 'mov.w r0, #0'.

2
test/CodeGen/Thumb2/thumb2-cmn2.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; -0x000000bb = 4294967109
define i1 @f1(i32 %a) {

2
test/CodeGen/Thumb2/thumb2-cmp.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; These tests would be improved by 'movs r0, #0' being rematerialized below the
; test as 'mov.w r0, #0'.

2
test/CodeGen/Thumb2/thumb2-cmp2.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; These tests would be improved by 'movs r0, #0' being rematerialized below the
; test as 'mov.w r0, #0'.

2
test/CodeGen/Thumb2/thumb2-eor.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a, i32 %b) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-eor2.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; 0x000000bb = 187
define i32 @f1(i32 %a) {

2
test/CodeGen/Thumb2/thumb2-jtb.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 -arm-adjust-jump-tables=0 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 -arm-adjust-jump-tables=0 | FileCheck %s
; Do not use tbb / tbh if any destination is before the jumptable.
; rdar://7102917

2
test/CodeGen/Thumb2/thumb2-ldr.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32* %v) {
entry:

8
test/CodeGen/Thumb2/thumb2-ldr_ext.ll
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@ -1,7 +1,7 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep ldrb | count 1
; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep ldrh | count 1
; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep ldrsb | count 1
; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep ldrsh | count 1
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | grep ldrb | count 1
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | grep ldrh | count 1
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | grep ldrsb | count 1
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | grep ldrsh | count 1
define i32 @test1(i8* %v.pntr.s0.u1) {
%tmp.u = load i8* %v.pntr.s0.u1

2
test/CodeGen/Thumb2/thumb2-ldr_post.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i32 @test(i32 %a, i32 %b, i32 %c) {
%tmp1 = mul i32 %a, %b ; <i32> [#uses=2]

4
test/CodeGen/Thumb2/thumb2-ldr_pre.ll
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@ -1,6 +1,6 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | \
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | \
; RUN: grep "ldr.*\!" | count 3
; RUN: llc < %s -march=thumb -mattr=+thumb2 | \
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | \
; RUN: grep "ldrsb.*\!" | count 1
define i32* @test1(i32* %X, i32* %dest) {

2
test/CodeGen/Thumb2/thumb2-ldrb.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i8 @f1(i8* %v) {
entry:

2
test/CodeGen/Thumb2/thumb2-ldrh.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i16 @f1(i16* %v) {
entry:

2
test/CodeGen/Thumb2/thumb2-lsl.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-lsl2.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a, i32 %b) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-lsr.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-lsr2.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a, i32 %b) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-lsr3.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i1 @test1(i64 %poscnt, i32 %work) {
entry:

5
test/CodeGen/Thumb2/thumb2-mla.ll
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@ -1,5 +1,6 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mattr=+thumb2 -arm-use-mulops=false | FileCheck %s -check-prefix=NO_MULOPS
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 \
; RUN: -arm-use-mulops=false | FileCheck %s -check-prefix=NO_MULOPS
define i32 @f1(i32 %a, i32 %b, i32 %c) {
%tmp1 = mul i32 %a, %b

2
test/CodeGen/Thumb2/thumb2-mls.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a, i32 %b, i32 %c) {
%tmp1 = mul i32 %a, %b

2
test/CodeGen/Thumb2/thumb2-mov.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; Test #<const>

2
test/CodeGen/Thumb2/thumb2-mul.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a, i32 %b, i32 %c) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-mulhi.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2,+t2dsp | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2,+t2dsp | FileCheck %s
define i32 @smulhi(i32 %x, i32 %y) {
; CHECK: smulhi

2
test/CodeGen/Thumb2/thumb2-mvn2.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-neg.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-orn.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a, i32 %b) {

2
test/CodeGen/Thumb2/thumb2-orn2.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; 0x000000bb = 187

2
test/CodeGen/Thumb2/thumb2-orr.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a, i32 %b) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-orr2.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; 0x000000bb = 187

2
test/CodeGen/Thumb2/thumb2-pack.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2,+t2xtpk | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2,+t2xtpk | FileCheck %s
; CHECK: test1
; CHECK: pkhbt r0, r0, r1, lsl #16

2
test/CodeGen/Thumb2/thumb2-rev.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2,+v7,+t2xtpk | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2,+v7,+t2xtpk | FileCheck %s
define i32 @f1(i32 %a) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-rev16.ll
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@ -1,7 +1,7 @@
; XFAIL: *
; fixme rev16 pattern is not matching
; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep "rev16\W*r[0-9]*,\W*r[0-9]*" | count 1
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | grep "rev16\W*r[0-9]*,\W*r[0-9]*" | count 1
; 0xff00ff00 = 4278255360
; 0x00ff00ff = 16711935

2
test/CodeGen/Thumb2/thumb2-ror.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb | FileCheck %s -check-prefix=THUMB1
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-rsb.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a, i32 %b) {
%tmp = shl i32 %b, 5

2
test/CodeGen/Thumb2/thumb2-rsb2.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; 171 = 0x000000ab
define i32 @f1(i32 %a) {

2
test/CodeGen/Thumb2/thumb2-sbc.ll
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@ -1,4 +1,4 @@
; RUN: llc -march=thumb -mattr=+thumb2 < %s | FileCheck %s
; RUN: llc -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 < %s | FileCheck %s
define i64 @f1(i64 %a, i64 %b) {
; CHECK: f1

2
test/CodeGen/Thumb2/thumb2-select.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 -show-mc-encoding | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 -show-mc-encoding | FileCheck %s
define i32 @f1(i32 %a.s) {
entry:

2
test/CodeGen/Thumb2/thumb2-select_xform.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i32 @t1(i32 %a, i32 %b, i32 %c) nounwind {
; CHECK: t1

4
test/CodeGen/Thumb2/thumb2-smla.ll
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@ -1,5 +1,5 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2,+t2xtpk,+t2dsp | FileCheck %s
; RUN: llc < %s -march=thumb -mattr=+thumb2,+t2xtpk,+t2dsp -arm-use-mulops=false | FileCheck %s -check-prefix=NO_MULOPS
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2,+t2xtpk,+t2dsp | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2,+t2xtpk,+t2dsp -arm-use-mulops=false | FileCheck %s -check-prefix=NO_MULOPS
define i32 @f3(i32 %a, i16 %x, i32 %y) {
; CHECK: f3

2
test/CodeGen/Thumb2/thumb2-smul.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2,+t2xtpk,+t2dsp | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2,+t2xtpk,+t2dsp | FileCheck %s
@x = weak global i16 0 ; <i16*> [#uses=1]
@y = weak global i16 0 ; <i16*> [#uses=0]

2
test/CodeGen/Thumb2/thumb2-str.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a, i32* %v) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-str_post.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i16 @test1(i32* %X, i16* %A) {
; CHECK-LABEL: test1:

2
test/CodeGen/Thumb2/thumb2-str_pre.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define void @test1(i32* %X, i32* %A, i32** %dest) {
; CHECK: test1

2
test/CodeGen/Thumb2/thumb2-strb.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i8 @f1(i8 %a, i8* %v) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-strh.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i16 @f1(i16 %a, i16* %v) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-sub.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; 171 = 0x000000ab
define i32 @f1(i32 %a) {

2
test/CodeGen/Thumb2/thumb2-sub2.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a) {
%tmp = sub i32 %a, 4095

2
test/CodeGen/Thumb2/thumb2-sub3.ll
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@ -1,4 +1,4 @@
; RUN: llc -march=thumb -mattr=+thumb2 < %s | FileCheck %s
; RUN: llc -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 < %s | FileCheck %s
; 171 = 0x000000ab
define i64 @f1(i64 %a) {

2
test/CodeGen/Thumb2/thumb2-sub4.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a, i32 %b) {
; CHECK-LABEL: f1:

3
test/CodeGen/Thumb2/thumb2-sub5.ll
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@ -1,4 +1,5 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 -mattr=+32bit | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2,+32bit \
; RUN: | FileCheck %s
define i64 @f1(i64 %a, i64 %b) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-sxt_rot.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2,+t2xtpk | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2,+t2xtpk | FileCheck %s
define i32 @test0(i8 %A) {
; CHECK: test0

2
test/CodeGen/Thumb2/thumb2-teq.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; These tests would be improved by 'movs r0, #0' being rematerialized below the
; test as 'mov.w r0, #0'.

2
test/CodeGen/Thumb2/thumb2-teq2.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; These tests would be improved by 'movs r0, #0' being rematerialized below the
; tst as 'mov.w r0, #0'.

2
test/CodeGen/Thumb2/thumb2-tst.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; These tests would be improved by 'movs r0, #0' being rematerialized below the
; tst as 'mov.w r0, #0'.

2
test/CodeGen/Thumb2/thumb2-tst2.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; These tests would be improved by 'movs r0, #0' being rematerialized below the
; tst as 'mov.w r0, #0'.