mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-19 04:29:21 +00:00
Fix ldmxcsr JIT encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31343 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
a90a24c623
commit
acf7f2e3a9
@ -1653,12 +1653,10 @@ def MFENCE : I<0xAE, MRM6m, (ops),
|
||||
"mfence", [(int_x86_sse2_mfence)]>, TB, Requires<[HasSSE2]>;
|
||||
|
||||
// MXCSR register
|
||||
def LDMXCSR : I<0xAE, MRM5m, (ops i32mem:$src),
|
||||
"ldmxcsr $src",
|
||||
[(int_x86_sse_ldmxcsr addr:$src)]>, TB, Requires<[HasSSE1]>;
|
||||
def STMXCSR : I<0xAE, MRM3m, (ops i32mem:$dst),
|
||||
"stmxcsr $dst",
|
||||
[(int_x86_sse_stmxcsr addr:$dst)]>, TB, Requires<[HasSSE1]>;
|
||||
def LDMXCSR : PSI<0xAE, MRM2m, (ops i32mem:$src),
|
||||
"ldmxcsr $src", [(int_x86_sse_ldmxcsr addr:$src)]>;
|
||||
def STMXCSR : PSI<0xAE, MRM3m, (ops i32mem:$dst),
|
||||
"stmxcsr $dst", [(int_x86_sse_stmxcsr addr:$dst)]>;
|
||||
|
||||
// Thread synchronization
|
||||
def MONITOR : I<0xC8, RawFrm, (ops), "monitor",
|
||||
|
Loading…
Reference in New Issue
Block a user