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New test case: identity operation of RHS / LHS of a VECTOR_SHUFFLE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37637 91177308-0d34-0410-b5e6-96231b3b80d8
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11
test/CodeGen/X86/vec_shuffle-11.ll
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11
test/CodeGen/X86/vec_shuffle-11.ll
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; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2
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; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep mov
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define <4 x i32> @test() {
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%tmp131 = call <2 x i64> @llvm.x86.sse2.psrl.dq( <2 x i64> < i64 -1, i64 -1 >, i32 96 ) ; <<2 x i64>> [#uses=1]
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%tmp137 = bitcast <2 x i64> %tmp131 to <4 x i32> ; <<4 x i32>> [#uses=1]
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%tmp138 = and <4 x i32> %tmp137, bitcast (<2 x i64> < i64 -1, i64 -1 > to <4 x i32>) ; <<4 x i32>> [#uses=1]
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ret <4 x i32> %tmp138
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}
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declare <2 x i64> @llvm.x86.sse2.psrl.dq(<2 x i64>, i32)
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