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- Fix support for "special" i64 immediates that can be loaded

Browse Source 
using IL, ILA, et. al. v2i64 and i64 are now supported by
  the select bits (SELB) instruction.

- Add missing comparison operations (testcase forthcoming)

- More multiclass refactoring.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47973 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Scott Michel
2008-03-05 23:02:02 +00:00
parent 53dec47f3b
commit ad2715e0d7
4 changed files with 363 additions and 649 deletions
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11
lib/Target/CellSPU/SPUOperands.td
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@@ -141,7 +141,7 @@ def imm18 : PatLeaf<(imm), [{
}]>;
def lo16 : PatLeaf<(imm), [{
// hi16 predicate - returns true if the immediate has all zeros in the
// lo16 predicate - returns true if the immediate has all zeros in the
// low order bits and is a 32-bit constant:
if (N->getValueType(0) == MVT::i32) {
uint32_t val = N->getValue();
@@ -155,8 +155,11 @@ def hi16 : PatLeaf<(imm), [{
// hi16 predicate - returns true if the immediate has all zeros in the
// low order bits and is a 32-bit constant:
if (N->getValueType(0) == MVT::i32) {
uint32_t val = N->getValue();
uint32_t val = uint32_t(N->getValue());
return ((val & 0xffff0000) == val);
} else if (N->getValueType(0) == MVT::i64) {
uint64_t val = N->getValue();
return ((val & 0xffff0000ULL) == val);
}
return false;
@@ -503,6 +506,10 @@ def s16imm_f64: Operand<f64> {
let PrintMethod = "printS16ImmOperand";
}
def u16imm_i64 : Operand<i64> {
let PrintMethod = "printU16ImmOperand";
}
def u16imm : Operand<i32> {
let PrintMethod = "printU16ImmOperand";
}