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R600/SI: Lowercase register names

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229151 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tom Stellard 2015-02-13 21:02:36 +00:00
parent 1f85e3b090
commit ad4bb96a12
1 changed files with 4 additions and 4 deletions
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8
lib/Target/R600/SIRegisterInfo.td
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@ -21,7 +21,7 @@ def VCC_LO : SIReg<"vcc_lo", 106>;
def VCC_HI : SIReg<"vcc_hi", 107>;
// VCC for 64-bit instructions
def VCC : RegisterWithSubRegs<"VCC", [VCC_LO, VCC_HI]> {
def VCC : RegisterWithSubRegs<"vcc", [VCC_LO, VCC_HI]> {
let Namespace = "AMDGPU";
let SubRegIndices = [sub0, sub1];
let HWEncoding = 106;
@ -36,14 +36,14 @@ def EXEC : RegisterWithSubRegs<"EXEC", [EXEC_LO, EXEC_HI]> {
let HWEncoding = 126;
}
def SCC : SIReg<"SCC", 253>;
def M0 : SIReg <"M0", 124>;
def SCC : SIReg<"scc", 253>;
def M0 : SIReg <"m0", 124>;
def FLAT_SCR_LO : SIReg<"flat_scr_lo", 104>; // Offset in units of 256-bytes.
def FLAT_SCR_HI : SIReg<"flat_scr_hi", 105>; // Size is the per-thread scratch size, in bytes.
// Pair to indicate location of scratch space for flat accesses.
def FLAT_SCR : RegisterWithSubRegs <"FLAT_SCR", [FLAT_SCR_LO, FLAT_SCR_HI]> {
def FLAT_SCR : RegisterWithSubRegs <"flat_scr", [FLAT_SCR_LO, FLAT_SCR_HI]> {
let Namespace = "AMDGPU";
let SubRegIndices = [sub0, sub1];
let HWEncoding = 104;