Doh. ARM::PC is obvious a reserved register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34763 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2007-02-28 23:12:34 +00:00
parent c6aedf70b3
commit ad78ef2154

View File

@ -315,6 +315,7 @@ ARMRegisterInfo::getCalleeSavedRegClasses() const {
BitVector ARMRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
BitVector Reserved(getNumRegs());
Reserved.set(ARM::SP);
Reserved.set(ARM::PC);
if (STI.isTargetDarwin() || hasFP(MF))
Reserved.set(FramePtr);
// Some targets reserve R9.