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Doh. ARM::PC is obvious a reserved register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34763 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -315,6 +315,7 @@ ARMRegisterInfo::getCalleeSavedRegClasses() const {
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BitVector ARMRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
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BitVector Reserved(getNumRegs());
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Reserved.set(ARM::SP);
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Reserved.set(ARM::PC);
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if (STI.isTargetDarwin() || hasFP(MF))
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Reserved.set(FramePtr);
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// Some targets reserve R9.
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