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ShiftAmt might equal to zero. Handle this situation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35094 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1997,6 +1997,7 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, APInt DemandedMask,
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RHSKnownZero <<= ShiftAmt;
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RHSKnownOne <<= ShiftAmt;
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// low bits known zero.
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if (ShiftAmt)
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RHSKnownZero |= APInt::getAllOnesValue(ShiftAmt).zextOrCopy(BitWidth);
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}
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break;
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@ -2013,15 +2014,17 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, APInt DemandedMask,
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return true;
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assert((RHSKnownZero & RHSKnownOne) == 0 &&
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"Bits known to be one AND zero?");
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// Compute the new bits that are at the top now.
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APInt HighBits(APInt::getAllOnesValue(ShiftAmt).zextOrCopy(BitWidth).shl(
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BitWidth - ShiftAmt));
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RHSKnownZero &= TypeMask;
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RHSKnownOne &= TypeMask;
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RHSKnownZero = APIntOps::lshr(RHSKnownZero, ShiftAmt);
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RHSKnownOne = APIntOps::lshr(RHSKnownOne, ShiftAmt);
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if (ShiftAmt) {
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// Compute the new bits that are at the top now.
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APInt HighBits(APInt::getAllOnesValue(BitWidth).shl(
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BitWidth - ShiftAmt));
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RHSKnownZero |= HighBits; // high bits known zero.
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}
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}
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break;
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case Instruction::AShr:
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// If this is an arithmetic shift right and only the low-bit is set, we can
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@ -2048,8 +2051,7 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, APInt DemandedMask,
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assert((RHSKnownZero & RHSKnownOne) == 0 &&
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"Bits known to be one AND zero?");
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// Compute the new bits that are at the top now.
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APInt HighBits(APInt::getAllOnesValue(ShiftAmt).zextOrCopy(BitWidth).shl(
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BitWidth - ShiftAmt));
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APInt HighBits(APInt::getAllOnesValue(BitWidth).shl(BitWidth - ShiftAmt));
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RHSKnownZero &= TypeMask;
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RHSKnownOne &= TypeMask;
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RHSKnownZero = APIntOps::lshr(RHSKnownZero, ShiftAmt);
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