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Disable ldc1/sdc1 instructions for mips1 targets.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88887 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bruno Cardoso Lopes 2009-11-16 04:35:29 +00:00
parent 6e0b658dad
commit add2076c06
1 changed files with 2 additions and 1 deletions
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3
lib/Target/Mips/MipsInstrFPU.td
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@ -48,6 +48,7 @@ let PrintMethod = "printFCCOperand" in
def In32BitMode : Predicate<"!Subtarget.isFP64bit()">;
def IsSingleFloat : Predicate<"Subtarget.isSingleFloat()">;
def IsNotSingleFloat : Predicate<"!Subtarget.isSingleFloat()">;
def IsNotMipsI : Predicate<"!Subtarget.isMips1()">;
//===----------------------------------------------------------------------===//
// Instruction Class Templates
@ -173,7 +174,7 @@ let fd = 0 in {
}
/// Floating Point Memory Instructions
let Predicates = [IsNotSingleFloat] in {
let Predicates = [IsNotSingleFloat, IsNotMipsI] in {
def LDC1 : FFI<0b110101, (outs AFGR64:$ft), (ins mem:$addr),
"ldc1 $ft, $addr", [(set AFGR64:$ft, (load addr:$addr))]>;