6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-07-25 13:24:46 +00:00
Code Issues Projects Releases Wiki Activity

Implement the llvm.bit.part_select.iN.iN.iN overloaded intrinsic.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35678 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Reid Spencer
2007-04-04 23:48:25 +00:00
parent 93a8415cef
commit addd11d98e
5 changed files with 199 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

14
test/CodeGen/Generic/bit-intrinsics.ll Normal file
View File

@@ -0,0 +1,14 @@
; Make sure this testcase is supported by all code generators. Either the
; intrinsic is supported natively or IntrinsicLowering provides it.
; RUN: llvm-as < %s | llc
declare i32 @llvm.bit.part.select.i32.i32(i32 %x, i32 %hi, i32 %lo)
declare i16 @llvm.bit.part.select.i16.i16(i16 %x, i32 %hi, i32 %lo)
define i32 @bit_part_select(i32 %A, i16 %B) {
%a = call i32 @llvm.bit.part.select.i32.i32(i32 %A, i32 8, i32 0)
%b = call i16 @llvm.bit.part.select.i16.i16(i16 %B, i32 8, i32 0)
%c = zext i16 %b to i32
%d = add i32 %a, %c
ret i32 %d
}