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Apply again changes to support ARM memory asm parsing. I removed

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all LDR/STR changes and left them to a future patch. Passing all
checks now.

- Implement asm parsing support for LDRT, LDRBT, STRT, STRBT and
  fix the encoding wherever is possible.
- Add a new encoding bit to describe the index mode used and teach
  printAddrMode2Operand to check by the addressing mode which index
  mode to print.
- Testcases

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128689 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bruno Cardoso Lopes
2011-03-31 23:26:08 +00:00
parent 842759662b
commit ae0855401b
10 changed files with 364 additions and 77 deletions
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13
lib/Target/ARM/ARMAddressingModes.h
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@@ -408,16 +408,18 @@ namespace ARM_AM {
//
// The first operand is always a Reg. The second operand is a reg if in
// reg/reg form, otherwise it's reg#0. The third field encodes the operation
// in bit 12, the immediate in bits 0-11, and the shift op in 13-15.
// in bit 12, the immediate in bits 0-11, and the shift op in 13-15. The
// forth operand 16-17 encodes the index mode.
//
// If this addressing mode is a frame index (before prolog/epilog insertion
// and code rewriting), this operand will have the form: FI#, reg0, <offs>
// with no shift amount for the frame offset.
//
static inline unsigned getAM2Opc(AddrOpc Opc, unsigned Imm12, ShiftOpc SO) {
static inline unsigned getAM2Opc(AddrOpc Opc, unsigned Imm12, ShiftOpc SO,
unsigned IdxMode = 0) {
assert(Imm12 < (1 << 12) && "Imm too large!");
bool isSub = Opc == sub;
return Imm12 | ((int)isSub << 12) | (SO << 13);
return Imm12 | ((int)isSub << 12) | (SO << 13) | (IdxMode << 16) ;
}
static inline unsigned getAM2Offset(unsigned AM2Opc) {
return AM2Opc & ((1 << 12)-1);
@@ -426,7 +428,10 @@ namespace ARM_AM {
return ((AM2Opc >> 12) & 1) ? sub : add;
}
static inline ShiftOpc getAM2ShiftOpc(unsigned AM2Opc) {
return (ShiftOpc)(AM2Opc >> 13);
return (ShiftOpc)((AM2Opc >> 13) & 7);
}
static inline unsigned getAM2IdxMode(unsigned AM2Opc) {
return (AM2Opc >> 16);
}