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https://github.com/c64scene-ar/llvm-6502.git
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expose DWARF_LABEL opcode# so the branch folder can update debug info properly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31024 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -219,6 +219,13 @@ public:
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return get(Opcode).Flags & M_VARIABLE_OPS;
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return get(Opcode).Flags & M_VARIABLE_OPS;
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}
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}
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/// getDWARF_LABELOpcode - Return the opcode of the target's DWARF_LABEL
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/// instruction if it has one. This is used by codegen passes that update
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/// DWARF line number info as they modify the code.
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virtual unsigned getDWARF_LABELOpcode() const {
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return 0;
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}
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/// Return true if the instruction is a register to register move
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/// Return true if the instruction is a register to register move
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/// and leave the source and dest operands in the passed parameters.
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/// and leave the source and dest operands in the passed parameters.
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virtual bool isMoveInstr(const MachineInstr& MI,
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virtual bool isMoveInstr(const MachineInstr& MI,
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@@ -77,6 +77,13 @@ public:
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/// This is used for addressing modes.
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/// This is used for addressing modes.
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virtual const TargetRegisterClass *getPointerRegClass() const;
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virtual const TargetRegisterClass *getPointerRegClass() const;
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/// getDWARF_LABELOpcode - Return the opcode of the target's DWARF_LABEL
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/// instruction if it has one. This is used by codegen passes that update
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/// DWARF line number info as they modify the code.
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virtual unsigned getDWARF_LABELOpcode() const {
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return PPC::DWARF_LABEL;
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}
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// Return true if the instruction is a register to register move and
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// Return true if the instruction is a register to register move and
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// leave the source and dest operands in the passed parameters.
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// leave the source and dest operands in the passed parameters.
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//
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//
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@@ -25,6 +25,13 @@ X86InstrInfo::X86InstrInfo(X86TargetMachine &tm)
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TM(tm), RI(tm, *this) {
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TM(tm), RI(tm, *this) {
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}
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}
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/// getDWARF_LABELOpcode - Return the opcode of the target's DWARF_LABEL
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/// instruction if it has one. This is used by codegen passes that update
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/// DWARF line number info as they modify the code.
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unsigned X86InstrInfo::getDWARF_LABELOpcode() const {
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return X86::DWARF_LABEL;
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}
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bool X86InstrInfo::isMoveInstr(const MachineInstr& MI,
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bool X86InstrInfo::isMoveInstr(const MachineInstr& MI,
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unsigned& sourceReg,
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unsigned& sourceReg,
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@@ -205,6 +205,11 @@ public:
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unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const;
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unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const;
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unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const;
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unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const;
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/// getDWARF_LABELOpcode - Return the opcode of the target's DWARF_LABEL
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/// instruction if it has one. This is used by codegen passes that update
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/// DWARF line number info as they modify the code.
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virtual unsigned getDWARF_LABELOpcode() const;
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/// convertToThreeAddress - This method must be implemented by targets that
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/// convertToThreeAddress - This method must be implemented by targets that
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/// set the M_CONVERTIBLE_TO_3_ADDR flag. When this flag is set, the target
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/// set the M_CONVERTIBLE_TO_3_ADDR flag. When this flag is set, the target
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/// may be able to convert a two-address instruction into a true
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/// may be able to convert a two-address instruction into a true
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