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Split the Add, Sub, and Mul instruction opcodes into separate

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integer and floating-point opcodes, introducing
FAdd, FSub, and FMul.

For now, the AsmParser, BitcodeReader, and IRBuilder all preserve
backwards compatability, and the Core LLVM APIs preserve backwards
compatibility for IR producers. Most front-ends won't need to change
immediately.

This implements the first step of the plan outlined here:
http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman
2009-06-04 22:49:04 +00:00
parent d18e31ae17
commit ae3a0be92e
265 changed files with 2374 additions and 1924 deletions
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9
lib/Bitcode/Reader/BitcodeReader.cpp
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@ -104,9 +104,12 @@ static int GetDecodedCastOpcode(unsigned Val) {
static int GetDecodedBinaryOpcode(unsigned Val, const Type *Ty) {
switch (Val) {
default: return -1;
case bitc::BINOP_ADD: return Instruction::Add;
case bitc::BINOP_SUB: return Instruction::Sub;
case bitc::BINOP_MUL: return Instruction::Mul;
case bitc::BINOP_ADD:
return Ty->isFPOrFPVector() ? Instruction::FAdd : Instruction::Add;
case bitc::BINOP_SUB:
return Ty->isFPOrFPVector() ? Instruction::FSub : Instruction::Sub;
case bitc::BINOP_MUL:
return Ty->isFPOrFPVector() ? Instruction::FMul : Instruction::Mul;
case bitc::BINOP_UDIV: return Instruction::UDiv;
case bitc::BINOP_SDIV:
return Ty->isFPOrFPVector() ? Instruction::FDiv : Instruction::SDiv;