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MC/Mach-O: Stub out explicit MCMachObjectTargetWriter interface.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121973 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -14,7 +14,23 @@
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namespace llvm {
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MCObjectWriter *createMachObjectWriter(raw_ostream &OS, bool is64Bit,
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class MCMachObjectTargetWriter {
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protected:
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MCMachObjectTargetWriter();
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public:
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virtual ~MCMachObjectTargetWriter();
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};
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/// \brief Construct a new Mach-O writer instance.
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///
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/// This routine takes ownership of the target writer subclass.
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///
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/// \param MOTW - The target specific Mach-O writer subclass.
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/// \param OS - The stream to write to.
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/// \returns The constructed object writer.
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MCObjectWriter *createMachObjectWriter(MCMachObjectTargetWriter *MOTW,
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raw_ostream &OS, bool is64Bit,
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uint32_t CPUType, uint32_t CPUSubtype,
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bool IsLittleEndian);
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@ -16,6 +16,7 @@ add_llvm_library(LLVMMC
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MCDwarf.cpp
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MCLoggingStreamer.cpp
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MCMachOStreamer.cpp
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MCMachObjectTargetWriter.cpp
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MCNullStreamer.cpp
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MCObjectStreamer.cpp
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MCObjectFormat.cpp
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18
lib/MC/MCMachObjectTargetWriter.cpp
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18
lib/MC/MCMachObjectTargetWriter.cpp
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@ -0,0 +1,18 @@
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//===-- MCMachObjectTargetWriter.cpp - Mach-O Target Writer Subclass ------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/MC/MCMachObjectWriter.h"
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using namespace llvm;
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MCMachObjectTargetWriter::MCMachObjectTargetWriter() {
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}
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MCMachObjectTargetWriter::~MCMachObjectTargetWriter() {
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}
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@ -7,12 +7,13 @@
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/MC/MCMachObjectWriter.h"
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#include "llvm/ADT/OwningPtr.h"
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#include "llvm/ADT/StringMap.h"
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#include "llvm/ADT/Twine.h"
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#include "llvm/MC/MCAssembler.h"
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#include "llvm/MC/MCAsmLayout.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCMachObjectWriter.h"
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#include "llvm/MC/MCObjectWriter.h"
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#include "llvm/MC/MCSectionMachO.h"
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#include "llvm/MC/MCSymbol.h"
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@ -162,17 +163,8 @@ class MachObjectWriter : public MCObjectWriter {
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}
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};
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/// @name Utility Methods
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/// @{
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bool isFixupKindPCRel(const MCAssembler &Asm, unsigned Kind) {
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const MCFixupKindInfo &FKI = Asm.getBackend().getFixupKindInfo(
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(MCFixupKind) Kind);
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return FKI.Flags & MCFixupKindInfo::FKF_IsPCRel;
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}
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/// @}
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/// The target specific Mach-O writer instance.
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llvm::OwningPtr<MCMachObjectTargetWriter> TargetObjectWriter;
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/// @name Relocation Data
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/// @{
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@ -192,6 +184,19 @@ class MachObjectWriter : public MCObjectWriter {
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/// @}
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private:
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/// @name Utility Methods
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/// @{
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bool isFixupKindPCRel(const MCAssembler &Asm, unsigned Kind) {
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const MCFixupKindInfo &FKI = Asm.getBackend().getFixupKindInfo(
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(MCFixupKind) Kind);
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return FKI.Flags & MCFixupKindInfo::FKF_IsPCRel;
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}
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/// @}
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SectionAddrMap SectionAddress;
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uint64_t getSectionAddress(const MCSectionData* SD) const {
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return SectionAddress.lookup(SD);
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@ -226,10 +231,10 @@ class MachObjectWriter : public MCObjectWriter {
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uint32_t CPUSubtype;
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public:
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MachObjectWriter(raw_ostream &_OS,
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MachObjectWriter(MCMachObjectTargetWriter *MOTW, raw_ostream &_OS,
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bool _Is64Bit, uint32_t _CPUType, uint32_t _CPUSubtype,
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bool _IsLittleEndian)
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: MCObjectWriter(_OS, _IsLittleEndian),
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: MCObjectWriter(_OS, _IsLittleEndian), TargetObjectWriter(MOTW),
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Is64Bit(_Is64Bit), CPUType(_CPUType), CPUSubtype(_CPUSubtype) {
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}
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@ -1321,9 +1326,11 @@ public:
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}
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MCObjectWriter *llvm::createMachObjectWriter(raw_ostream &OS, bool is64Bit,
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MCObjectWriter *llvm::createMachObjectWriter(MCMachObjectTargetWriter *MOTW,
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raw_ostream &OS, bool is64Bit,
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uint32_t CPUType,
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uint32_t CPUSubtype,
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bool IsLittleEndian) {
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return new MachObjectWriter(OS, is64Bit, CPUType, CPUSubtype, IsLittleEndian);
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return new MachObjectWriter(MOTW, OS, is64Bit, CPUType, CPUSubtype,
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IsLittleEndian);
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}
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@ -28,6 +28,9 @@
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using namespace llvm;
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namespace {
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class ARMMachObjectWriter : public MCMachObjectTargetWriter {
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};
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class ARMAsmBackend : public TargetAsmBackend {
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bool isThumbMode; // Currently emitting Thumb code.
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public:
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@ -382,7 +385,8 @@ public:
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MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
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// FIXME: Subtarget info should be derived. Force v7 for now.
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return createMachObjectWriter(OS, /*Is64Bit=*/false,
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return createMachObjectWriter(new ARMMachObjectWriter,
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OS, /*Is64Bit=*/false,
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object::mach::CTM_ARM,
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object::mach::CSARM_V7,
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/*IsLittleEndian=*/true);
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@ -19,6 +19,9 @@
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using namespace llvm;
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namespace {
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class PPCMachObjectWriter : public MCMachObjectTargetWriter {
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};
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class PPCAsmBackend : public TargetAsmBackend {
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const Target &TheTarget;
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public:
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@ -92,7 +95,8 @@ namespace {
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MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
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bool is64 = getPointerSize() == 8;
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return createMachObjectWriter(OS, /*Is64Bit=*/is64,
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return createMachObjectWriter(new PPCMachObjectWriter,
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OS, /*Is64Bit=*/is64,
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(is64 ? object::mach::CTM_PowerPC64 :
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object::mach::CTM_PowerPC),
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object::mach::CSPPC_ALL,
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@ -46,6 +46,9 @@ static unsigned getFixupKindLog2Size(unsigned Kind) {
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}
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namespace {
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class X86MachObjectWriter : public MCMachObjectTargetWriter {
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};
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class X86AsmBackend : public TargetAsmBackend {
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public:
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X86AsmBackend(const Target &T)
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@ -362,7 +365,8 @@ public:
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: DarwinX86AsmBackend(T) {}
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MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
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return createMachObjectWriter(OS, /*Is64Bit=*/false,
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return createMachObjectWriter(new X86MachObjectWriter,
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OS, /*Is64Bit=*/false,
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object::mach::CTM_i386,
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object::mach::CSX86_ALL,
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/*IsLittleEndian=*/true);
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@ -377,7 +381,8 @@ public:
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}
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MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
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return createMachObjectWriter(OS, /*Is64Bit=*/true,
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return createMachObjectWriter(new X86MachObjectWriter,
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OS, /*Is64Bit=*/true,
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object::mach::CTM_x86_64,
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object::mach::CSX86_ALL,
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/*IsLittleEndian=*/true);
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