MC/Mach-O: Stub out explicit MCMachObjectTargetWriter interface.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121973 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Daniel Dunbar 2010-12-16 16:09:19 +00:00
parent 297ed28bf9
commit ae5abd595f
7 changed files with 76 additions and 21 deletions

View File

@ -14,7 +14,23 @@
namespace llvm {
MCObjectWriter *createMachObjectWriter(raw_ostream &OS, bool is64Bit,
class MCMachObjectTargetWriter {
protected:
MCMachObjectTargetWriter();
public:
virtual ~MCMachObjectTargetWriter();
};
/// \brief Construct a new Mach-O writer instance.
///
/// This routine takes ownership of the target writer subclass.
///
/// \param MOTW - The target specific Mach-O writer subclass.
/// \param OS - The stream to write to.
/// \returns The constructed object writer.
MCObjectWriter *createMachObjectWriter(MCMachObjectTargetWriter *MOTW,
raw_ostream &OS, bool is64Bit,
uint32_t CPUType, uint32_t CPUSubtype,
bool IsLittleEndian);

View File

@ -16,6 +16,7 @@ add_llvm_library(LLVMMC
MCDwarf.cpp
MCLoggingStreamer.cpp
MCMachOStreamer.cpp
MCMachObjectTargetWriter.cpp
MCNullStreamer.cpp
MCObjectStreamer.cpp
MCObjectFormat.cpp

View File

@ -0,0 +1,18 @@
//===-- MCMachObjectTargetWriter.cpp - Mach-O Target Writer Subclass ------===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
#include "llvm/MC/MCMachObjectWriter.h"
using namespace llvm;
MCMachObjectTargetWriter::MCMachObjectTargetWriter() {
}
MCMachObjectTargetWriter::~MCMachObjectTargetWriter() {
}

View File

@ -7,12 +7,13 @@
//
//===----------------------------------------------------------------------===//
#include "llvm/MC/MCMachObjectWriter.h"
#include "llvm/ADT/OwningPtr.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/Twine.h"
#include "llvm/MC/MCAssembler.h"
#include "llvm/MC/MCAsmLayout.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCMachObjectWriter.h"
#include "llvm/MC/MCObjectWriter.h"
#include "llvm/MC/MCSectionMachO.h"
#include "llvm/MC/MCSymbol.h"
@ -162,17 +163,8 @@ class MachObjectWriter : public MCObjectWriter {
}
};
/// @name Utility Methods
/// @{
bool isFixupKindPCRel(const MCAssembler &Asm, unsigned Kind) {
const MCFixupKindInfo &FKI = Asm.getBackend().getFixupKindInfo(
(MCFixupKind) Kind);
return FKI.Flags & MCFixupKindInfo::FKF_IsPCRel;
}
/// @}
/// The target specific Mach-O writer instance.
llvm::OwningPtr<MCMachObjectTargetWriter> TargetObjectWriter;
/// @name Relocation Data
/// @{
@ -192,6 +184,19 @@ class MachObjectWriter : public MCObjectWriter {
/// @}
private:
/// @name Utility Methods
/// @{
bool isFixupKindPCRel(const MCAssembler &Asm, unsigned Kind) {
const MCFixupKindInfo &FKI = Asm.getBackend().getFixupKindInfo(
(MCFixupKind) Kind);
return FKI.Flags & MCFixupKindInfo::FKF_IsPCRel;
}
/// @}
SectionAddrMap SectionAddress;
uint64_t getSectionAddress(const MCSectionData* SD) const {
return SectionAddress.lookup(SD);
@ -226,10 +231,10 @@ class MachObjectWriter : public MCObjectWriter {
uint32_t CPUSubtype;
public:
MachObjectWriter(raw_ostream &_OS,
MachObjectWriter(MCMachObjectTargetWriter *MOTW, raw_ostream &_OS,
bool _Is64Bit, uint32_t _CPUType, uint32_t _CPUSubtype,
bool _IsLittleEndian)
: MCObjectWriter(_OS, _IsLittleEndian),
: MCObjectWriter(_OS, _IsLittleEndian), TargetObjectWriter(MOTW),
Is64Bit(_Is64Bit), CPUType(_CPUType), CPUSubtype(_CPUSubtype) {
}
@ -1321,9 +1326,11 @@ public:
}
MCObjectWriter *llvm::createMachObjectWriter(raw_ostream &OS, bool is64Bit,
MCObjectWriter *llvm::createMachObjectWriter(MCMachObjectTargetWriter *MOTW,
raw_ostream &OS, bool is64Bit,
uint32_t CPUType,
uint32_t CPUSubtype,
bool IsLittleEndian) {
return new MachObjectWriter(OS, is64Bit, CPUType, CPUSubtype, IsLittleEndian);
return new MachObjectWriter(MOTW, OS, is64Bit, CPUType, CPUSubtype,
IsLittleEndian);
}

View File

@ -28,6 +28,9 @@
using namespace llvm;
namespace {
class ARMMachObjectWriter : public MCMachObjectTargetWriter {
};
class ARMAsmBackend : public TargetAsmBackend {
bool isThumbMode; // Currently emitting Thumb code.
public:
@ -382,7 +385,8 @@ public:
MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
// FIXME: Subtarget info should be derived. Force v7 for now.
return createMachObjectWriter(OS, /*Is64Bit=*/false,
return createMachObjectWriter(new ARMMachObjectWriter,
OS, /*Is64Bit=*/false,
object::mach::CTM_ARM,
object::mach::CSARM_V7,
/*IsLittleEndian=*/true);

View File

@ -19,6 +19,9 @@
using namespace llvm;
namespace {
class PPCMachObjectWriter : public MCMachObjectTargetWriter {
};
class PPCAsmBackend : public TargetAsmBackend {
const Target &TheTarget;
public:
@ -92,7 +95,8 @@ namespace {
MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
bool is64 = getPointerSize() == 8;
return createMachObjectWriter(OS, /*Is64Bit=*/is64,
return createMachObjectWriter(new PPCMachObjectWriter,
OS, /*Is64Bit=*/is64,
(is64 ? object::mach::CTM_PowerPC64 :
object::mach::CTM_PowerPC),
object::mach::CSPPC_ALL,

View File

@ -46,6 +46,9 @@ static unsigned getFixupKindLog2Size(unsigned Kind) {
}
namespace {
class X86MachObjectWriter : public MCMachObjectTargetWriter {
};
class X86AsmBackend : public TargetAsmBackend {
public:
X86AsmBackend(const Target &T)
@ -362,7 +365,8 @@ public:
: DarwinX86AsmBackend(T) {}
MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
return createMachObjectWriter(OS, /*Is64Bit=*/false,
return createMachObjectWriter(new X86MachObjectWriter,
OS, /*Is64Bit=*/false,
object::mach::CTM_i386,
object::mach::CSX86_ALL,
/*IsLittleEndian=*/true);
@ -377,7 +381,8 @@ public:
}
MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
return createMachObjectWriter(OS, /*Is64Bit=*/true,
return createMachObjectWriter(new X86MachObjectWriter,
OS, /*Is64Bit=*/true,
object::mach::CTM_x86_64,
object::mach::CSX86_ALL,
/*IsLittleEndian=*/true);