mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-21 18:29:46 +00:00
ExecutionDepsFix: Indizes -> Indices.
Translate german to english. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231500 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
83f6fece72
commit
ae6bbac733
@ -174,7 +174,7 @@ public:
|
||||
|
||||
private:
|
||||
iterator_range<SmallVectorImpl<int>::const_iterator>
|
||||
regIndizes(unsigned Reg) const;
|
||||
regIndices(unsigned Reg) const;
|
||||
|
||||
// DomainValue allocation.
|
||||
DomainValue *alloc(int domain = -1);
|
||||
@ -205,10 +205,10 @@ private:
|
||||
|
||||
char ExeDepsFix::ID = 0;
|
||||
|
||||
/// Translate TRI register number to a list of indizes into our smaller tables
|
||||
/// Translate TRI register number to a list of indices into our smaller tables
|
||||
/// of interesting registers.
|
||||
iterator_range<SmallVectorImpl<int>::const_iterator>
|
||||
ExeDepsFix::regIndizes(unsigned Reg) const {
|
||||
ExeDepsFix::regIndices(unsigned Reg) const {
|
||||
assert(Reg < AliasMap.size() && "Invalid register");
|
||||
const auto &Entry = AliasMap[Reg];
|
||||
return make_range(Entry.begin(), Entry.end());
|
||||
@ -378,7 +378,7 @@ void ExeDepsFix::enterBasicBlock(MachineBasicBlock *MBB) {
|
||||
if (MBB->pred_empty()) {
|
||||
for (MachineBasicBlock::livein_iterator i = MBB->livein_begin(),
|
||||
e = MBB->livein_end(); i != e; ++i) {
|
||||
for (int rx : regIndizes(*i)) {
|
||||
for (int rx : regIndices(*i)) {
|
||||
// Treat function live-ins as if they were defined just before the first
|
||||
// instruction. Usually, function arguments are set up immediately
|
||||
// before the call.
|
||||
@ -475,7 +475,7 @@ void ExeDepsFix::visitInstr(MachineInstr *MI) {
|
||||
bool ExeDepsFix::shouldBreakDependence(MachineInstr *MI, unsigned OpIdx,
|
||||
unsigned Pref) {
|
||||
unsigned reg = MI->getOperand(OpIdx).getReg();
|
||||
for (int rx : regIndizes(reg)) {
|
||||
for (int rx : regIndices(reg)) {
|
||||
unsigned Clearance = CurInstr - LiveRegs[rx].Def;
|
||||
DEBUG(dbgs() << "Clearance: " << Clearance << ", want " << Pref);
|
||||
|
||||
@ -521,7 +521,7 @@ void ExeDepsFix::processDefs(MachineInstr *MI, bool Kill) {
|
||||
break;
|
||||
if (MO.isUse())
|
||||
continue;
|
||||
for (int rx : regIndizes(MO.getReg())) {
|
||||
for (int rx : regIndices(MO.getReg())) {
|
||||
// This instruction explicitly defines rx.
|
||||
DEBUG(dbgs() << TRI->getName(RC->getRegister(rx)) << ":\t" << CurInstr
|
||||
<< '\t' << *MI);
|
||||
@ -587,7 +587,7 @@ void ExeDepsFix::visitHardInstr(MachineInstr *mi, unsigned domain) {
|
||||
e = mi->getDesc().getNumOperands(); i != e; ++i) {
|
||||
MachineOperand &mo = mi->getOperand(i);
|
||||
if (!mo.isReg()) continue;
|
||||
for (int rx : regIndizes(mo.getReg())) {
|
||||
for (int rx : regIndices(mo.getReg())) {
|
||||
force(rx, domain);
|
||||
}
|
||||
}
|
||||
@ -596,7 +596,7 @@ void ExeDepsFix::visitHardInstr(MachineInstr *mi, unsigned domain) {
|
||||
for (unsigned i = 0, e = mi->getDesc().getNumDefs(); i != e; ++i) {
|
||||
MachineOperand &mo = mi->getOperand(i);
|
||||
if (!mo.isReg()) continue;
|
||||
for (int rx : regIndizes(mo.getReg())) {
|
||||
for (int rx : regIndices(mo.getReg())) {
|
||||
kill(rx);
|
||||
force(rx, domain);
|
||||
}
|
||||
@ -616,7 +616,7 @@ void ExeDepsFix::visitSoftInstr(MachineInstr *mi, unsigned mask) {
|
||||
e = mi->getDesc().getNumOperands(); i != e; ++i) {
|
||||
MachineOperand &mo = mi->getOperand(i);
|
||||
if (!mo.isReg()) continue;
|
||||
for (int rx : regIndizes(mo.getReg())) {
|
||||
for (int rx : regIndices(mo.getReg())) {
|
||||
DomainValue *dv = LiveRegs[rx].Value;
|
||||
if (dv == nullptr)
|
||||
continue;
|
||||
@ -712,7 +712,7 @@ void ExeDepsFix::visitSoftInstr(MachineInstr *mi, unsigned mask) {
|
||||
ii != ee; ++ii) {
|
||||
MachineOperand &mo = *ii;
|
||||
if (!mo.isReg()) continue;
|
||||
for (int rx : regIndizes(mo.getReg())) {
|
||||
for (int rx : regIndices(mo.getReg())) {
|
||||
if (!LiveRegs[rx].Value || (mo.isDef() && LiveRegs[rx].Value != dv)) {
|
||||
kill(rx);
|
||||
setLiveReg(rx, dv);
|
||||
|
Loading…
Reference in New Issue
Block a user