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Add a new field to TargetInstrDescriptor for tracking information about
operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22908 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -29,6 +29,7 @@ class Instruction;
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class Constant;
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class Constant;
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class Function;
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class Function;
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class MachineCodeForInstruction;
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class MachineCodeForInstruction;
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class TargetRegisterClass;
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//---------------------------------------------------------------------------
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//---------------------------------------------------------------------------
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// Data types used to define information about a single machine instruction
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// Data types used to define information about a single machine instruction
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@@ -72,6 +73,19 @@ const unsigned M_COMMUTABLE = 1 << 11;
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// before control flow occurs.
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// before control flow occurs.
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const unsigned M_TERMINATOR_FLAG = 1 << 12;
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const unsigned M_TERMINATOR_FLAG = 1 << 12;
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/// TargetOperandInfo - This holds information about one operand of a machine
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/// instruction, indicating the register class for register operands, etc.
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///
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class TargetOperandInfo {
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public:
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/// RegClass - This specifies the register class of the operand if the
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/// operand is a register. If not, this contains null.
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const TargetRegisterClass *RegClass;
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/// Currently no other information.
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};
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class TargetInstrDescriptor {
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class TargetInstrDescriptor {
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public:
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public:
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const char * Name; // Assembly language mnemonic for the opcode.
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const char * Name; // Assembly language mnemonic for the opcode.
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@@ -87,6 +101,7 @@ public:
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unsigned TSFlags; // Target Specific Flag values
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unsigned TSFlags; // Target Specific Flag values
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const unsigned *ImplicitUses; // Registers implicitly read by this instr
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const unsigned *ImplicitUses; // Registers implicitly read by this instr
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const unsigned *ImplicitDefs; // Registers implicitly defined by this instr
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const unsigned *ImplicitDefs; // Registers implicitly defined by this instr
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const TargetOperandInfo *OpInfo; // 'numOperands' entries about operands.
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};
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};
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