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Use multiple filecheck prefixes in msan instrumentation tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195342 91177308-0d34-0410-b5e6-96231b3b80d8
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test/Instrumentation/MemorySanitizer/check_access_address.ll
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28
test/Instrumentation/MemorySanitizer/check_access_address.ll
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@ -0,0 +1,28 @@
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; RUN: opt < %s -msan -msan-check-access-address=1 -S | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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; Test byval argument shadow alignment
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define <2 x i64> @ByValArgumentShadowLargeAlignment(<2 x i64>* byval %p) sanitize_memory {
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entry:
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%x = load <2 x i64>* %p
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ret <2 x i64> %x
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}
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; CHECK: @ByValArgumentShadowLargeAlignment
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; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* {{.*}}, i8* {{.*}}, i64 16, i32 8, i1 false)
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; CHECK: ret <2 x i64>
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define i16 @ByValArgumentShadowSmallAlignment(i16* byval %p) sanitize_memory {
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entry:
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%x = load i16* %p
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ret i16 %x
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}
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; CHECK: @ByValArgumentShadowSmallAlignment
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; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* {{.*}}, i8* {{.*}}, i64 2, i32 2, i1 false)
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; CHECK: ret i16
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@ -1,6 +1,5 @@
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; RUN: opt < %s -msan -msan-check-access-address=0 -S | FileCheck %s
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; RUN: opt < %s -msan -msan-check-access-address=0 -msan-track-origins=1 -S | FileCheck -check-prefix=CHECK-ORIGINS %s
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; RUN: opt < %s -msan -msan-check-access-address=1 -S | FileCheck %s -check-prefix=CHECK-AA
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; RUN: opt < %s -msan -msan-check-access-address=0 -msan-track-origins=1 -S | FileCheck -check-prefix=CHECK -check-prefix=CHECK-ORIGINS %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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@ -32,20 +31,16 @@ entry:
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; CHECK: @Store
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; CHECK: load {{.*}} @__msan_param_tls
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; CHECK-ORIGINS: load {{.*}} @__msan_param_origin_tls
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; CHECK: store
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; CHECK: store
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; CHECK: ret void
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; CHECK-ORIGINS: @Store
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; CHECK-ORIGINS: load {{.*}} @__msan_param_tls
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; CHECK-ORIGINS: store
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; CHECK-ORIGINS: icmp
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; CHECK-ORIGINS: br i1
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; CHECK-ORIGINS: <label>
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; CHECK-ORIGINS: store
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; CHECK-ORIGINS: br label
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; CHECK-ORIGINS: <label>
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; CHECK-ORIGINS: store
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; CHECK-ORIGINS: ret void
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; CHECK: store
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; CHECK: ret void
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; Check instrumentation of aligned stores
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@ -60,20 +55,16 @@ entry:
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; CHECK: @AlignedStore
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; CHECK: load {{.*}} @__msan_param_tls
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; CHECK-ORIGINS: load {{.*}} @__msan_param_origin_tls
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; CHECK: store {{.*}} align 32
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; CHECK: store {{.*}} align 32
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; CHECK: ret void
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; CHECK-ORIGINS: @AlignedStore
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; CHECK-ORIGINS: load {{.*}} @__msan_param_tls
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; CHECK-ORIGINS: store {{.*}} align 32
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; CHECK-ORIGINS: icmp
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; CHECK-ORIGINS: br i1
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; CHECK-ORIGINS: <label>
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; CHECK-ORIGINS: store {{.*}} align 32
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; CHECK-ORIGINS: br label
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; CHECK-ORIGINS: <label>
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; CHECK-ORIGINS: store {{.*}} align 32
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; CHECK-ORIGINS: ret void
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; CHECK: store {{.*}} align 32
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; CHECK: ret void
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; load followed by cmp: check that we load the shadow and call __msan_warning.
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@ -251,10 +242,9 @@ declare void @llvm.memmove.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32,
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; Check that we propagate shadow for "select"
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define i32 @Select(i32 %a, i32 %b, i32 %c) nounwind uwtable readnone sanitize_memory {
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define i32 @Select(i32 %a, i32 %b, i1 %c) nounwind uwtable readnone sanitize_memory {
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entry:
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%tobool = icmp ne i32 %c, 0
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%cond = select i1 %tobool, i32 %a, i32 %b
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%cond = select i1 %c, i32 %a, i32 %b
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ret i32 %cond
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}
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@ -263,6 +253,8 @@ entry:
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; CHECK-NEXT: sext i1 {{.*}} to i32
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; CHECK-NEXT: or i32
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; CHECK-NEXT: select
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; CHECK-ORIGINS: select
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; CHECK-ORIGINS: select
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; CHECK: ret i32
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@ -280,14 +272,12 @@ entry:
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; CHECK: select <8 x i1>
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; CHECK-NEXT: sext <8 x i1> {{.*}} to <8 x i16>
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; CHECK-NEXT: or <8 x i16>
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; CHECK-NEXT: select <8 x i1>
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; CHECK-ORIGINS: bitcast <8 x i1> {{.*}} to i8
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; CHECK-ORIGINS: icmp ne i8 {{.*}}, 0
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; CHECK-ORIGINS: select i1
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; CHECK: select <8 x i1>
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; CHECK: ret <8 x i16>
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; CHECK-ORIGINS: @SelectVector
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; CHECK-ORIGINS: bitcast <8 x i1> {{.*}} to i8
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; CHECK-ORIGINS: icmp ne i8
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; CHECK-ORIGINS: select i1
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; CHECK-ORIGINS: ret <8 x i16>
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; Check that we propagate origin for "select" with scalar condition and vector
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@ -318,6 +308,7 @@ entry:
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; CHECK: @SelectStruct
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; CHECK: select i1 {{.*}}, { i64, i64 }
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; CHECK-NEXT: select i1 {{.*}}, { i64, i64 } { i64 -1, i64 -1 }, { i64, i64 }
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; CHECK-ORIGINS: select i1
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; CHECK-NEXT: select i1 {{.*}}, { i64, i64 }
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; CHECK: ret { i64, i64 }
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@ -330,9 +321,10 @@ entry:
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; CHECK: @IntToPtr
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; CHECK: load i64*{{.*}}__msan_param_tls
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; CHECK-ORIGINS-NEXT: load i32*{{.*}}__msan_param_origin_tls
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; CHECK-NEXT: inttoptr
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; CHECK-NEXT: store i64{{.*}}__msan_retval_tls
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; CHECK: ret i8
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; CHECK: ret i8*
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define i8* @IntToPtr_ZExt(i16 %x) nounwind uwtable readnone sanitize_memory {
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@ -342,9 +334,11 @@ entry:
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}
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; CHECK: @IntToPtr_ZExt
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; CHECK: load i16*{{.*}}__msan_param_tls
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; CHECK: zext
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; CHECK-NEXT: inttoptr
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; CHECK: ret i8
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; CHECK-NEXT: store i64{{.*}}__msan_retval_tls
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; CHECK: ret i8*
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; Check that we insert exactly one check on udiv
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@ -474,13 +468,8 @@ define i32 @ShadowLoadAlignmentSmall() nounwind uwtable sanitize_memory {
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; CHECK: @ShadowLoadAlignmentSmall
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; CHECK: load volatile i32* {{.*}} align 2
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; CHECK: load i32* {{.*}} align 2
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; CHECK: ret i32
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; CHECK-ORIGINS: @ShadowLoadAlignmentSmall
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; CHECK-ORIGINS: load volatile i32* {{.*}} align 2
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; CHECK-ORIGINS: load i32* {{.*}} align 2
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; CHECK-ORIGINS: load i32* {{.*}} align 4
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; CHECK-ORIGINS: ret i32
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; CHECK: ret i32
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; Test vector manipulation instructions.
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@ -567,17 +556,13 @@ declare <16 x i8> @llvm.x86.sse3.ldu.dq(i8* %p) nounwind
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; CHECK: @LoadIntrinsic
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; CHECK: load <16 x i8>* {{.*}} align 1
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; CHECK-ORIGINS: [[ORIGIN:%[01-9a-z]+]] = load i32* {{.*}}
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; CHECK-NOT: br
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; CHECK-NOT: = or
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; CHECK: call <16 x i8> @llvm.x86.sse3.ldu.dq
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; CHECK: store <16 x i8> {{.*}} @__msan_retval_tls
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; CHECK: ret <16 x i8>
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; CHECK-ORIGINS: @LoadIntrinsic
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; CHECK-ORIGINS: [[ORIGIN:%[01-9a-z]+]] = load i32* {{.*}}
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; CHECK-ORIGINS: call <16 x i8> @llvm.x86.sse3.ldu.dq
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; CHECK-ORIGINS: store i32 {{.*}}[[ORIGIN]], i32* @__msan_retval_origin_tls
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; CHECK-ORIGINS: ret <16 x i8>
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; CHECK: ret <16 x i8>
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; Simple NoMem intrinsic
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@ -593,21 +578,17 @@ declare <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> %a, <8 x i16> %b) nounwind
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; CHECK: @Paddsw128
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; CHECK-NEXT: load <8 x i16>* {{.*}} @__msan_param_tls
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; CHECK-ORIGINS: load i32* {{.*}} @__msan_param_origin_tls
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; CHECK-NEXT: load <8 x i16>* {{.*}} @__msan_param_tls
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; CHECK-ORIGINS: load i32* {{.*}} @__msan_param_origin_tls
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; CHECK-NEXT: = or <8 x i16>
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; CHECK-NEXT: call <8 x i16> @llvm.x86.sse2.padds.w
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; CHECK-NEXT: store <8 x i16> {{.*}} @__msan_retval_tls
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; CHECK-NEXT: ret <8 x i16>
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; CHECK-ORIGINS: @Paddsw128
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; CHECK-ORIGINS: load i32* {{.*}} @__msan_param_origin_tls
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; CHECK-ORIGINS: load i32* {{.*}} @__msan_param_origin_tls
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; CHECK-ORIGINS: = bitcast <8 x i16> {{.*}} to i128
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; CHECK-ORIGINS-NEXT: = icmp ne i128 {{.*}}, 0
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; CHECK-ORIGINS-NEXT: = select i1 {{.*}}, i32 {{.*}}, i32
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; CHECK-ORIGINS: call <8 x i16> @llvm.x86.sse2.padds.w
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; CHECK-NEXT: call <8 x i16> @llvm.x86.sse2.padds.w
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; CHECK-NEXT: store <8 x i16> {{.*}} @__msan_retval_tls
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; CHECK-ORIGINS: store i32 {{.*}} @__msan_retval_origin_tls
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; CHECK-ORIGINS: ret <8 x i16>
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; CHECK-NEXT: ret <8 x i16>
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; Test handling of vectors of pointers.
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@ -752,30 +733,6 @@ entry:
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; CHECK: ret <2 x i64>
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; Test byval argument shadow alignment
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define <2 x i64> @ByValArgumentShadowLargeAlignment(<2 x i64>* byval %p) sanitize_memory {
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entry:
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%x = load <2 x i64>* %p
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ret <2 x i64> %x
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}
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; CHECK-AA: @ByValArgumentShadowLargeAlignment
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; CHECK-AA: call void @llvm.memcpy.p0i8.p0i8.i64(i8* {{.*}}, i8* {{.*}}, i64 16, i32 8, i1 false)
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; CHECK-AA: ret <2 x i64>
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define i16 @ByValArgumentShadowSmallAlignment(i16* byval %p) sanitize_memory {
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entry:
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%x = load i16* %p
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ret i16 %x
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}
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; CHECK-AA: @ByValArgumentShadowSmallAlignment
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; CHECK-AA: call void @llvm.memcpy.p0i8.p0i8.i64(i8* {{.*}}, i8* {{.*}}, i64 2, i32 2, i1 false)
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; CHECK-AA: ret i16
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; Test origin propagation for insertvalue
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define { i64, i32 } @make_pair_64_32(i64 %x, i32 %y) sanitize_memory {
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