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ARM instruction don't have instruction prefixes, so remove the helper functions
for them from the MCCodeEmitter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115975 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -13,7 +13,7 @@
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#define DEBUG_TYPE "arm-emitter"
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#define DEBUG_TYPE "arm-emitter"
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#include "ARM.h"
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#include "ARM.h"
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#include "ARMInstrInfo.h"
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#include "ARMBaseInfo.h"
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#include "llvm/MC/MCCodeEmitter.h"
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#include "llvm/MC/MCCodeEmitter.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/MC/MCInst.h"
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@ -75,10 +75,6 @@ public:
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void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
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void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
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SmallVectorImpl<MCFixup> &Fixups) const;
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SmallVectorImpl<MCFixup> &Fixups) const;
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void EmitOpcodePrefix(uint64_t TSFlags, unsigned &CurByte, int MemOperand,
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const MCInst &MI, const TargetInstrDesc &Desc,
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raw_ostream &OS) const;
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};
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};
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} // end anonymous namespace
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} // end anonymous namespace
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@ -97,17 +93,6 @@ EmitImmediate(const MCOperand &DispOp, unsigned Size, MCFixupKind FixupKind,
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assert(0 && "ARMMCCodeEmitter::EmitImmediate() not yet implemented.");
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assert(0 && "ARMMCCodeEmitter::EmitImmediate() not yet implemented.");
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}
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}
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/// EmitOpcodePrefix - Emit all instruction prefixes prior to the opcode.
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///
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/// MemOperand is the operand # of the start of a memory operand if present. If
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/// Not present, it is -1.
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void ARMMCCodeEmitter::EmitOpcodePrefix(uint64_t TSFlags, unsigned &CurByte,
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int MemOperand, const MCInst &MI,
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const TargetInstrDesc &Desc,
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raw_ostream &OS) const {
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assert(0 && "ARMMCCodeEmitter::EmitOpcodePrefix() not yet implemented.");
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}
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void ARMMCCodeEmitter::
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void ARMMCCodeEmitter::
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EncodeInstruction(const MCInst &MI, raw_ostream &OS,
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EncodeInstruction(const MCInst &MI, raw_ostream &OS,
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SmallVectorImpl<MCFixup> &Fixups) const {
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SmallVectorImpl<MCFixup> &Fixups) const {
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