Revert "Refactor ARM subarchitecture parsing"

This reverts commit 7b4a6882467e7fef4516a0cbc418cbfce0fc6f6d.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212521 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Renato Golin 2014-07-08 10:06:16 +00:00
parent 60d8767211
commit aebcee661e
3 changed files with 82 additions and 123 deletions

View File

@ -78,22 +78,6 @@ public:
spir, // SPIR: standard portable IR for OpenCL 32-bit version spir, // SPIR: standard portable IR for OpenCL 32-bit version
spir64 // SPIR: standard portable IR for OpenCL 64-bit version spir64 // SPIR: standard portable IR for OpenCL 64-bit version
}; };
enum SubArchType {
NoSubArch,
ARMSubArch_v8,
ARMSubArch_v7,
ARMSubArch_v7em,
ARMSubArch_v7m,
ARMSubArch_v7s,
ARMSubArch_v6,
ARMSubArch_v6m,
ARMSubArch_v6t2,
ARMSubArch_v5,
ARMSubArch_v5te,
ARMSubArch_v4t,
ARMSubArch_v4
};
enum VendorType { enum VendorType {
UnknownVendor, UnknownVendor,
@ -164,9 +148,6 @@ private:
/// The parsed arch type. /// The parsed arch type.
ArchType Arch; ArchType Arch;
/// The parsed subarchitecture type.
SubArchType SubArch;
/// The parsed vendor type. /// The parsed vendor type.
VendorType Vendor; VendorType Vendor;
@ -209,9 +190,6 @@ public:
/// getArch - Get the parsed architecture type of this triple. /// getArch - Get the parsed architecture type of this triple.
ArchType getArch() const { return Arch; } ArchType getArch() const { return Arch; }
/// getSubArch - get the parsed subarchitecture type for this triple.
SubArchType getSubArch() const { return SubArch; }
/// getVendor - Get the parsed vendor type of this triple. /// getVendor - Get the parsed vendor type of this triple.
VendorType getVendor() const { return Vendor; } VendorType getVendor() const { return Vendor; }

View File

@ -350,26 +350,6 @@ static Triple::ObjectFormatType parseFormat(StringRef EnvironmentName) {
.Default(Triple::UnknownObjectFormat); .Default(Triple::UnknownObjectFormat);
} }
static Triple::SubArchType parseSubArch(StringRef SubArchName) {
return StringSwitch<Triple::SubArchType>(SubArchName)
.EndsWith("v8", Triple::ARMSubArch_v8)
.EndsWith("v8a", Triple::ARMSubArch_v8)
.EndsWith("v7", Triple::ARMSubArch_v7)
.EndsWith("v7a", Triple::ARMSubArch_v7)
.EndsWith("v7em", Triple::ARMSubArch_v7em)
.EndsWith("v7m", Triple::ARMSubArch_v7m)
.EndsWith("v7s", Triple::ARMSubArch_v7s)
.EndsWith("v6", Triple::ARMSubArch_v6)
.EndsWith("v6m", Triple::ARMSubArch_v6m)
.EndsWith("v6t2", Triple::ARMSubArch_v6t2)
.EndsWith("v5", Triple::ARMSubArch_v5)
.EndsWith("v5t", Triple::ARMSubArch_v5)
.EndsWith("v5te", Triple::ARMSubArch_v5te)
.EndsWith("v4t", Triple::ARMSubArch_v4t)
.EndsWith("v4", Triple::ARMSubArch_v4)
.Default(Triple::NoSubArch);
}
static const char *getObjectFormatTypeName(Triple::ObjectFormatType Kind) { static const char *getObjectFormatTypeName(Triple::ObjectFormatType Kind) {
switch (Kind) { switch (Kind) {
case Triple::UnknownObjectFormat: return ""; case Triple::UnknownObjectFormat: return "";
@ -395,7 +375,6 @@ static Triple::ObjectFormatType getDefaultFormat(const Triple &T) {
Triple::Triple(const Twine &Str) Triple::Triple(const Twine &Str)
: Data(Str.str()), : Data(Str.str()),
Arch(parseArch(getArchName())), Arch(parseArch(getArchName())),
SubArch(parseSubArch(getArchName())),
Vendor(parseVendor(getVendorName())), Vendor(parseVendor(getVendorName())),
OS(parseOS(getOSName())), OS(parseOS(getOSName())),
Environment(parseEnvironment(getEnvironmentName())), Environment(parseEnvironment(getEnvironmentName())),
@ -413,7 +392,6 @@ Triple::Triple(const Twine &Str)
Triple::Triple(const Twine &ArchStr, const Twine &VendorStr, const Twine &OSStr) Triple::Triple(const Twine &ArchStr, const Twine &VendorStr, const Twine &OSStr)
: Data((ArchStr + Twine('-') + VendorStr + Twine('-') + OSStr).str()), : Data((ArchStr + Twine('-') + VendorStr + Twine('-') + OSStr).str()),
Arch(parseArch(ArchStr.str())), Arch(parseArch(ArchStr.str())),
SubArch(parseSubArch(ArchStr.str())),
Vendor(parseVendor(VendorStr.str())), Vendor(parseVendor(VendorStr.str())),
OS(parseOS(OSStr.str())), OS(parseOS(OSStr.str())),
Environment(), ObjectFormat(Triple::UnknownObjectFormat) { Environment(), ObjectFormat(Triple::UnknownObjectFormat) {
@ -430,7 +408,6 @@ Triple::Triple(const Twine &ArchStr, const Twine &VendorStr, const Twine &OSStr,
: Data((ArchStr + Twine('-') + VendorStr + Twine('-') + OSStr + Twine('-') + : Data((ArchStr + Twine('-') + VendorStr + Twine('-') + OSStr + Twine('-') +
EnvironmentStr).str()), EnvironmentStr).str()),
Arch(parseArch(ArchStr.str())), Arch(parseArch(ArchStr.str())),
SubArch(parseSubArch(ArchStr.str())),
Vendor(parseVendor(VendorStr.str())), Vendor(parseVendor(VendorStr.str())),
OS(parseOS(OSStr.str())), OS(parseOS(OSStr.str())),
Environment(parseEnvironment(EnvironmentStr.str())), Environment(parseEnvironment(EnvironmentStr.str())),

View File

@ -84,89 +84,93 @@ static bool getITDeprecationInfo(MCInst &MI, MCSubtargetInfo &STI,
std::string ARM_MC::ParseARMTriple(StringRef TT, StringRef CPU) { std::string ARM_MC::ParseARMTriple(StringRef TT, StringRef CPU) {
Triple triple(TT); Triple triple(TT);
// Set the boolean corresponding to the current target triple, or the default
// if one cannot be determined, to true.
unsigned Len = TT.size();
unsigned Idx = 0;
// FIXME: Enhance Triple helper class to extract ARM version.
bool isThumb = triple.getArch() == Triple::thumb || bool isThumb = triple.getArch() == Triple::thumb ||
triple.getArch() == Triple::thumbeb; triple.getArch() == Triple::thumbeb;
if (Len >= 5 && TT.substr(0, 4) == "armv")
Idx = 4;
else if (Len >= 7 && TT.substr(0, 6) == "armebv")
Idx = 6;
else if (Len >= 7 && TT.substr(0, 6) == "thumbv")
Idx = 6;
else if (Len >= 9 && TT.substr(0, 8) == "thumbebv")
Idx = 8;
bool NoCPU = CPU == "generic" || CPU.empty(); bool NoCPU = CPU == "generic" || CPU.empty();
std::string ARMArchFeature; std::string ARMArchFeature;
switch (triple.getSubArch()) { if (Idx) {
case Triple::ARMSubArch_v8: unsigned SubVer = TT[Idx];
if (NoCPU) if (SubVer == '8') {
// v8a: FeatureDB, FeatureFPARMv8, FeatureNEON, FeatureDSPThumb2, if (NoCPU)
// FeatureMP, FeatureHWDiv, FeatureHWDivARM, FeatureTrustZone, // v8a: FeatureDB, FeatureFPARMv8, FeatureNEON, FeatureDSPThumb2,
// FeatureT2XtPk, FeatureCrypto, FeatureCRC // FeatureMP, FeatureHWDiv, FeatureHWDivARM, FeatureTrustZone,
ARMArchFeature = "+v8,+db,+fp-armv8,+neon,+t2dsp,+mp,+hwdiv,+hwdiv-arm," // FeatureT2XtPk, FeatureCrypto, FeatureCRC
"+trustzone,+t2xtpk,+crypto,+crc"; ARMArchFeature = "+v8,+db,+fp-armv8,+neon,+t2dsp,+mp,+hwdiv,+hwdiv-arm,"
else "+trustzone,+t2xtpk,+crypto,+crc";
// Use CPU to figure out the exact features else
ARMArchFeature = "+v8"; // Use CPU to figure out the exact features
break; ARMArchFeature = "+v8";
case Triple::ARMSubArch_v7m: } else if (SubVer == '7') {
isThumb = true; if (Len >= Idx+2 && TT[Idx+1] == 'm') {
if (NoCPU) isThumb = true;
// v7m: FeatureNoARM, FeatureDB, FeatureHWDiv, FeatureMClass if (NoCPU)
ARMArchFeature = "+v7,+noarm,+db,+hwdiv,+mclass"; // v7m: FeatureNoARM, FeatureDB, FeatureHWDiv, FeatureMClass
else ARMArchFeature = "+v7,+noarm,+db,+hwdiv,+mclass";
// Use CPU to figure out the exact features. else
ARMArchFeature = "+v7"; // Use CPU to figure out the exact features.
break; ARMArchFeature = "+v7";
case Triple::ARMSubArch_v7em: } else if (Len >= Idx+3 && TT[Idx+1] == 'e'&& TT[Idx+2] == 'm') {
if (NoCPU) if (NoCPU)
// v7em: FeatureNoARM, FeatureDB, FeatureHWDiv, FeatureDSPThumb2, // v7em: FeatureNoARM, FeatureDB, FeatureHWDiv, FeatureDSPThumb2,
// FeatureT2XtPk, FeatureMClass // FeatureT2XtPk, FeatureMClass
ARMArchFeature = "+v7,+noarm,+db,+hwdiv,+t2dsp,t2xtpk,+mclass"; ARMArchFeature = "+v7,+noarm,+db,+hwdiv,+t2dsp,t2xtpk,+mclass";
else else
// Use CPU to figure out the exact features. // Use CPU to figure out the exact features.
ARMArchFeature = "+v7"; ARMArchFeature = "+v7";
break; } else if (Len >= Idx+2 && TT[Idx+1] == 's') {
case Triple::ARMSubArch_v7s: if (NoCPU)
if (NoCPU) // v7s: FeatureNEON, FeatureDB, FeatureDSPThumb2, FeatureHasRAS
// v7s: FeatureNEON, FeatureDB, FeatureDSPThumb2, FeatureHasRAS // Swift
// Swift ARMArchFeature = "+v7,+swift,+neon,+db,+t2dsp,+ras";
ARMArchFeature = "+v7,+swift,+neon,+db,+t2dsp,+ras"; else
else // Use CPU to figure out the exact features.
// Use CPU to figure out the exact features. ARMArchFeature = "+v7";
ARMArchFeature = "+v7"; } else {
break; // v7 CPUs have lots of different feature sets. If no CPU is specified,
case Triple::ARMSubArch_v7: // then assume v7a (e.g. cortex-a8) feature set. Otherwise, return
// v7 CPUs have lots of different feature sets. If no CPU is specified, // the "minimum" feature set and use CPU string to figure out the exact
// then assume v7a (e.g. cortex-a8) feature set. Otherwise, return // features.
// the "minimum" feature set and use CPU string to figure out the exact if (NoCPU)
// features. // v7a: FeatureNEON, FeatureDB, FeatureDSPThumb2, FeatureT2XtPk
if (NoCPU) ARMArchFeature = "+v7,+neon,+db,+t2dsp,+t2xtpk";
// v7a: FeatureNEON, FeatureDB, FeatureDSPThumb2, FeatureT2XtPk else
ARMArchFeature = "+v7,+neon,+db,+t2dsp,+t2xtpk"; // Use CPU to figure out the exact features.
else ARMArchFeature = "+v7";
// Use CPU to figure out the exact features. }
ARMArchFeature = "+v7"; } else if (SubVer == '6') {
break; if (Len >= Idx+3 && TT[Idx+1] == 't' && TT[Idx+2] == '2')
case Triple::ARMSubArch_v6t2: ARMArchFeature = "+v6t2";
ARMArchFeature = "+v6t2"; else if (Len >= Idx+2 && TT[Idx+1] == 'm') {
break; isThumb = true;
case Triple::ARMSubArch_v6m: if (NoCPU)
isThumb = true; // v6m: FeatureNoARM, FeatureMClass
if (NoCPU) ARMArchFeature = "+v6m,+noarm,+mclass";
// v6m: FeatureNoARM, FeatureMClass else
ARMArchFeature = "+v6m,+noarm,+mclass"; ARMArchFeature = "+v6";
else } else
ARMArchFeature = "+v6"; ARMArchFeature = "+v6";
break; } else if (SubVer == '5') {
case Triple::ARMSubArch_v6: if (Len >= Idx+3 && TT[Idx+1] == 't' && TT[Idx+2] == 'e')
ARMArchFeature = "+v6"; ARMArchFeature = "+v5te";
break; else
case Triple::ARMSubArch_v5te: ARMArchFeature = "+v5t";
ARMArchFeature = "+v5te"; } else if (SubVer == '4' && Len >= Idx+2 && TT[Idx+1] == 't')
break; ARMArchFeature = "+v4t";
case Triple::ARMSubArch_v5:
ARMArchFeature = "+v5t";
break;
case Triple::ARMSubArch_v4t:
ARMArchFeature = "+v4t";
break;
case Triple::NoSubArch:
case Triple::ARMSubArch_v4:
ARMArchFeature = "+v4";
break;
} }
if (isThumb) { if (isThumb) {