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https://github.com/c64scene-ar/llvm-6502.git
synced 2025-06-26 07:24:25 +00:00
Major improvement to how nodes are built for a BB.
LLVM instruction is no longer recorded in each node, but BB is. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1262 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
@ -138,12 +138,12 @@ void SchedGraphEdge::dump(int indent=0) const {
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/*ctor*/
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SchedGraphNode::SchedGraphNode(unsigned int _nodeId,
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const Instruction* _instr,
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const BasicBlock* _bb,
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const MachineInstr* _minstr,
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int indexInBB,
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const TargetMachine& target)
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: nodeId(_nodeId),
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instr(_instr),
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bb(_bb),
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minstr(_minstr),
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origIndexInBB(indexInBB),
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latency(0)
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@ -603,9 +603,6 @@ SchedGraph::addEdgesForInstruction(const MachineInstr& minstr,
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if (node == NULL)
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return;
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assert(node->getInstr() && "Should be no dummy nodes here!");
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const Instruction* instr = node->getInstr();
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// Add edges for all operands of the machine instruction.
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//
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for (unsigned i=0, numOps=minstr.getNumOperands(); i < numOps; i++)
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@ -778,26 +775,73 @@ SchedGraph::buildNodesforBB(const TargetMachine& target,
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ValueToDefVecMap& valueToDefVecMap)
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{
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const MachineInstrInfo& mii = target.getInstrInfo();
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int origIndexInBB = 0;
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// Build graph nodes for each VM instruction and gather def/use info.
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// Do both those together in a single pass over all machine instructions.
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for (BasicBlock::const_iterator II = bb->begin(); II != bb->end(); ++II)
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{
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const Instruction *instr = *II;
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const MachineCodeForVMInstr& mvec = instr->getMachineInstrVec();
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for (unsigned i=0; i < mvec.size(); i++)
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if (! mii.isDummyPhiInstr(mvec[i]->getOpCode()))
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const MachineCodeForBasicBlock& mvec = bb->getMachineInstrVec();
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for (unsigned i=0; i < mvec.size(); i++)
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if (! mii.isDummyPhiInstr(mvec[i]->getOpCode()))
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{
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SchedGraphNode* node = new SchedGraphNode(getNumNodes(), bb,
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mvec[i], i, target);
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this->noteGraphNodeForInstr(mvec[i], node);
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// Remember all register references and value defs
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findDefUseInfoAtInstr(target, node,
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memNodeVec, regToRefVecMap,valueToDefVecMap);
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}
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#undef REALLY_NEED_TO_SEARCH_SUCCESSOR_PHIS
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#ifdef REALLY_NEED_TO_SEARCH_SUCCESSOR_PHIS
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// This is a BIG UGLY HACK. IT NEEDS TO BE ELIMINATED.
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// Look for copy instructions inserted in this BB due to Phi instructions
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// in the successor BBs.
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// There MUST be exactly one copy per Phi in successor nodes.
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//
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for (BasicBlock::succ_const_iterator SI=bb->succ_begin(), SE=bb->succ_end();
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SI != SE; ++SI)
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for (BasicBlock::const_iterator PI=(*SI)->begin(), PE=(*SI)->end();
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PI != PE; ++PI)
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{
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if ((*PI)->getOpcode() != Instruction::PHINode)
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break; // No more Phis in this successor
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// Find the incoming value from block bb to block (*SI)
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int bbIndex = cast<PHINode>(*PI)->getBasicBlockIndex(bb);
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assert(bbIndex >= 0 && "But I know bb is a predecessor of (*SI)?");
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Value* inVal = cast<PHINode>(*PI)->getIncomingValue(bbIndex);
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assert(inVal != NULL && "There must be an in-value on every edge");
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// Find the machine instruction that makes a copy of inval to (*PI).
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// This must be in the current basic block (bb).
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const MachineCodeForVMInstr& mvec = (*PI)->getMachineInstrVec();
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const MachineInstr* theCopy = NULL;
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for (unsigned i=0; i < mvec.size() && theCopy == NULL; i++)
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if (! mii.isDummyPhiInstr(mvec[i]->getOpCode()))
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// not a Phi: assume this is a copy and examine its operands
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for (int o=0, N=(int) mvec[i]->getNumOperands(); o < N; o++)
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{
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const MachineOperand& mop = mvec[i]->getOperand(o);
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if (mvec[i]->operandIsDefined(o))
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assert(mop.getVRegValue() == (*PI) && "dest shd be my Phi");
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else if (mop.getVRegValue() == inVal)
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{ // found the copy!
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theCopy = mvec[i];
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break;
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}
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}
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// Found the dang instruction. Now create a node and do the rest...
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if (theCopy != NULL)
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{
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SchedGraphNode* node = new SchedGraphNode(getNumNodes(), instr,
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mvec[i], origIndexInBB++, target);
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this->noteGraphNodeForInstr(mvec[i], node);
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// Remember all register references and value defs
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SchedGraphNode* node = new SchedGraphNode(getNumNodes(), bb,
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theCopy, origIndexInBB++, target);
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this->noteGraphNodeForInstr(theCopy, node);
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findDefUseInfoAtInstr(target, node,
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memNodeVec, regToRefVecMap,valueToDefVecMap);
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}
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}
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}
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#endif REALLY_NEED_TO_SEARCH_SUCCESSOR_PHIS
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}
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