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Go through all kinds of trouble to mark 'blr' as having a predicate operand
that takes a register and condition code. Print these pieces of BLR the right way, even though it is currently set to 'always'. Next up: get the JIT encoding right, then enhance branch folding to produce predicated blr for simple examples. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31449 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -17,13 +17,31 @@
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#include <iosfwd>
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// GCC #defines PPC on Linux but we use it as our namespace name
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#undef PPC
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namespace llvm {
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class PPCTargetMachine;
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class FunctionPassManager;
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class FunctionPass;
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class MachineCodeEmitter;
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class PPCTargetMachine;
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class FunctionPassManager;
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class FunctionPass;
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class MachineCodeEmitter;
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namespace PPC {
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/// Predicate - These are "(BO << 5) | BI" for various predicates.
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enum Predicate {
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PRED_ALWAYS = (20 << 5) | 0,
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PRED_LT = (12 << 5) | 0,
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PRED_LE = ( 4 << 5) | 1,
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PRED_EQ = (12 << 5) | 2,
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PRED_GE = ( 4 << 5) | 0,
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PRED_GT = (12 << 5) | 1,
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PRED_NE = ( 4 << 5) | 2,
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PRED_UN = (12 << 5) | 3,
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PRED_NU = ( 4 << 5) | 3
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};
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}
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FunctionPass *createPPCBranchSelectionPass();
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FunctionPass *createPPCISelDag(PPCTargetMachine &TM);
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FunctionPass *createPPCAsmPrinterPass(std::ostream &OS,
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@@ -34,9 +52,6 @@ void addPPCMachOObjectWriterPass(FunctionPassManager &FPM, std::ostream &o,
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PPCTargetMachine &tm);
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} // end namespace llvm;
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// GCC #defines PPC on Linux but we use it as our namespace name
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#undef PPC
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// Defines symbolic names for PowerPC registers. This defines a mapping from
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// register name to register number.
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//
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