Go through all kinds of trouble to mark 'blr' as having a predicate operand

that takes a register and condition code.  Print these pieces of BLR the
right way, even though it is currently set to 'always'.

Next up: get the JIT encoding right, then enhance branch folding to produce
predicated blr for simple examples.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31449 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
2006-11-04 05:27:39 +00:00
parent efe9f4a3b6
commit af53a87052
3 changed files with 63 additions and 13 deletions

View File

@@ -17,13 +17,31 @@
#include <iosfwd>
// GCC #defines PPC on Linux but we use it as our namespace name
#undef PPC
namespace llvm {
class PPCTargetMachine;
class FunctionPassManager;
class FunctionPass;
class MachineCodeEmitter;
class PPCTargetMachine;
class FunctionPassManager;
class FunctionPass;
class MachineCodeEmitter;
namespace PPC {
/// Predicate - These are "(BO << 5) | BI" for various predicates.
enum Predicate {
PRED_ALWAYS = (20 << 5) | 0,
PRED_LT = (12 << 5) | 0,
PRED_LE = ( 4 << 5) | 1,
PRED_EQ = (12 << 5) | 2,
PRED_GE = ( 4 << 5) | 0,
PRED_GT = (12 << 5) | 1,
PRED_NE = ( 4 << 5) | 2,
PRED_UN = (12 << 5) | 3,
PRED_NU = ( 4 << 5) | 3
};
}
FunctionPass *createPPCBranchSelectionPass();
FunctionPass *createPPCISelDag(PPCTargetMachine &TM);
FunctionPass *createPPCAsmPrinterPass(std::ostream &OS,
@@ -34,9 +52,6 @@ void addPPCMachOObjectWriterPass(FunctionPassManager &FPM, std::ostream &o,
PPCTargetMachine &tm);
} // end namespace llvm;
// GCC #defines PPC on Linux but we use it as our namespace name
#undef PPC
// Defines symbolic names for PowerPC registers. This defines a mapping from
// register name to register number.
//