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* Store all non-volatile int registers R13-31 on the stack, restore on exit
* Fix comment formatting git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14900 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -112,9 +112,9 @@ void PowerPCRegisterInfo::
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eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
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eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I) const {
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MachineBasicBlock::iterator I) const {
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if (hasFP(MF)) {
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if (hasFP(MF)) {
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// If we have a frame pointer, turn the adjcallstackdown instruction into a
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// If we have a frame pointer, convert as follows:
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// 'sub r1, r1, <amt>' and the adjcallstackup instruction into
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// adjcallstackdown instruction => 'sub r1, r1, <amt>' and
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// 'add r1, r1, <amt>'
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// adjcallstackup instruction => 'add r1, r1, <amt>'
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MachineInstr *Old = I;
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MachineInstr *Old = I;
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int Amount = Old->getOperand(0).getImmedValue();
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int Amount = Old->getOperand(0).getImmedValue();
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if (Amount != 0) {
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if (Amount != 0) {
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@ -196,9 +196,9 @@ void PowerPCRegisterInfo::emitPrologue(MachineFunction &MF) const {
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//
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//
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NumBytes += MFI->getMaxCallFrameSize() +
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NumBytes += MFI->getMaxCallFrameSize() +
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24 /* Predefined PowerPC link area */ +
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24 /* Predefined PowerPC link area */ +
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// FIXME: must calculate #int regs actually spilled
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// FIXME: must calculate #non-volatile int regs actually spilled
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12*4 /* Spilled int regs */ +
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19*4 /* Spilled int regs */ +
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// FIXME: must calculate #fp regs actually spilled
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// FIXME: must calculate #non-volatile fp regs actually spilled
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0*8 /* Spilled fp regs */;
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0*8 /* Spilled fp regs */;
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// Round the size to a multiple of the alignment (don't forget the 4 byte
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// Round the size to a multiple of the alignment (don't forget the 4 byte
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@ -209,7 +209,8 @@ void PowerPCRegisterInfo::emitPrologue(MachineFunction &MF) const {
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// Store the incoming LR so it is preserved across calls
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// Store the incoming LR so it is preserved across calls
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MI = BuildMI(PPC32::MFLR, 0, PPC32::R0);
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MI = BuildMI(PPC32::MFLR, 0, PPC32::R0);
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MBB.insert(MBBI, MI);
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MBB.insert(MBBI, MI);
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MI = BuildMI(PPC32::STMW, 3).addReg(PPC32::R30).addSImm(-8)
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// FIXME: store only CLOBBERED registers in R[13-31]
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MI = BuildMI(PPC32::STMW, 3).addReg(PPC32::R13).addSImm(-76)
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.addReg(PPC32::R1);
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.addReg(PPC32::R1);
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MBB.insert(MBBI, MI);
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MBB.insert(MBBI, MI);
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MI = BuildMI(PPC32::STW, 3).addReg(PPC32::R0).addSImm(8).addReg(PPC32::R1);
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MI = BuildMI(PPC32::STW, 3).addReg(PPC32::R0).addSImm(8).addReg(PPC32::R1);
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@ -249,9 +250,10 @@ void PowerPCRegisterInfo::emitEpilogue(MachineFunction &MF,
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// Read old LR from stack into R0
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// Read old LR from stack into R0
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MI = BuildMI(PPC32::LWZ, 2, PPC32::R0).addSImm(8).addReg(PPC32::R1);
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MI = BuildMI(PPC32::LWZ, 2, PPC32::R0).addSImm(8).addReg(PPC32::R1);
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MBB.insert(MBBI, MI);
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MBB.insert(MBBI, MI);
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MI = BuildMI(PPC32::MTLR, 1).addReg(PPC32::R0);
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// FIXME: restore only SAVED registers in R[13-31]
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MI = BuildMI(PPC32::LMW, 2, PPC32::R13).addSImm(-76).addReg(PPC32::R1);
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MBB.insert(MBBI, MI);
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MBB.insert(MBBI, MI);
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MI = BuildMI(PPC32::LMW, 2, PPC32::R30).addSImm(-8).addReg(PPC32::R1);
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MI = BuildMI(PPC32::MTLR, 1).addReg(PPC32::R0);
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MBB.insert(MBBI, MI);
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MBB.insert(MBBI, MI);
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}
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}
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}
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}
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