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https://github.com/c64scene-ar/llvm-6502.git
synced 2026-04-25 21:18:19 +00:00
Fix more places which should be checking for iOS, not darwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147513 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -41,8 +41,8 @@ skipAlignedDPRCS2Spills(MachineBasicBlock::iterator MI,
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bool ARMFrameLowering::hasFP(const MachineFunction &MF) const {
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const TargetRegisterInfo *RegInfo = MF.getTarget().getRegisterInfo();
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// Mac OS X requires FP not to be clobbered for backtracing purpose.
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if (STI.isTargetDarwin())
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// iOS requires FP not to be clobbered for backtracing purpose.
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if (STI.isTargetIOS())
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return true;
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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@@ -183,7 +183,7 @@ void ARMFrameLowering::emitPrologue(MachineFunction &MF) const {
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case ARM::R11:
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if (Reg == FramePtr)
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FramePtrSpillFI = FI;
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if (STI.isTargetDarwin()) {
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if (STI.isTargetIOS()) {
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AFI->addGPRCalleeSavedArea2Frame(FI);
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GPRCS2Size += 4;
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} else {
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@@ -206,8 +206,8 @@ void ARMFrameLowering::emitPrologue(MachineFunction &MF) const {
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if (GPRCS1Size > 0) MBBI++;
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// Set FP to point to the stack slot that contains the previous FP.
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// For Darwin, FP is R7, which has now been stored in spill area 1.
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// Otherwise, if this is not Darwin, all the callee-saved registers go
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// For iOS, FP is R7, which has now been stored in spill area 1.
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// Otherwise, if this is not iOS, all the callee-saved registers go
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// into spill area 1, including the FP in R11. In either case, it is
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// now safe to emit this assignment.
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bool HasFP = hasFP(MF);
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@@ -383,7 +383,7 @@ void ARMFrameLowering::emitEpilogue(MachineFunction &MF,
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ARMCC::AL, 0, TII);
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else {
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// It's not possible to restore SP from FP in a single instruction.
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// For Darwin, this looks like:
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// For iOS, this looks like:
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// mov sp, r7
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// sub sp, #24
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// This is bad, if an interrupt is taken after the mov, sp is in an
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@@ -583,7 +583,7 @@ void ARMFrameLowering::emitPushInst(MachineBasicBlock &MBB,
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unsigned LastReg = 0;
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for (; i != 0; --i) {
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unsigned Reg = CSI[i-1].getReg();
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if (!(Func)(Reg, STI.isTargetDarwin())) continue;
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if (!(Func)(Reg, STI.isTargetIOS())) continue;
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// D-registers in the aligned area DPRCS2 are NOT spilled here.
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if (Reg >= ARM::D8 && Reg < ARM::D8 + NumAlignedDPRCS2Regs)
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@@ -656,7 +656,7 @@ void ARMFrameLowering::emitPopInst(MachineBasicBlock &MBB,
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bool DeleteRet = false;
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for (; i != 0; --i) {
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unsigned Reg = CSI[i-1].getReg();
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if (!(Func)(Reg, STI.isTargetDarwin())) continue;
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if (!(Func)(Reg, STI.isTargetIOS())) continue;
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// The aligned reloads from area DPRCS2 are not inserted here.
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if (Reg >= ARM::D8 && Reg < ARM::D8 + NumAlignedDPRCS2Regs)
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@@ -1256,7 +1256,7 @@ ARMFrameLowering::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
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if (Spilled) {
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NumGPRSpills++;
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if (!STI.isTargetDarwin()) {
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if (!STI.isTargetIOS()) {
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if (Reg == ARM::LR)
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LRSpilled = true;
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CS1Spilled = true;
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@@ -1276,7 +1276,7 @@ ARMFrameLowering::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
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break;
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}
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} else {
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if (!STI.isTargetDarwin()) {
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if (!STI.isTargetIOS()) {
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UnspilledCS1GPRs.push_back(Reg);
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continue;
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}
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