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[Sparc] Add support for parsing fcmp with %fcc registers.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202610 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Venkatraman Govindaraju
2014-03-02 03:39:39 +00:00
parent 80949c599f
commit afad335cae
11 changed files with 99 additions and 18 deletions
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13
lib/Target/Sparc/Disassembler/SparcDisassembler.cpp
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@ -113,6 +113,9 @@ static const unsigned QFPRegDecoderTable[] = {
SP::Q6, SP::Q14, ~0U, ~0U,
SP::Q7, SP::Q15, ~0U, ~0U } ;
static const unsigned FCCRegDecoderTable[] = {
SP::FCC0, SP::FCC1, SP::FCC2, SP::FCC3 };
static DecodeStatus DecodeIntRegsRegisterClass(MCInst &Inst,
unsigned RegNo,
uint64_t Address,
@ -174,6 +177,16 @@ static DecodeStatus DecodeQFPRegsRegisterClass(MCInst &Inst,
return MCDisassembler::Success;
}
static DecodeStatus DecodeFCCRegsRegisterClass(MCInst &Inst, unsigned RegNo,
uint64_t Address,
const void *Decoder) {
if (RegNo > 3)
return MCDisassembler::Fail;
Inst.addOperand(MCOperand::CreateReg(FCCRegDecoderTable[RegNo]));
return MCDisassembler::Success;
}
static DecodeStatus DecodeLoadInt(MCInst &Inst, unsigned insn, uint64_t Address,
const void *Decoder);
static DecodeStatus DecodeLoadFP(MCInst &Inst, unsigned insn, uint64_t Address,