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https://github.com/c64scene-ar/llvm-6502.git
synced 2025-07-25 13:24:46 +00:00
rename FP_SETRESULT -> FP_SET_ST0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48094 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
@@ -928,9 +928,9 @@ void FPS::handleSpecialFP(MachineBasicBlock::iterator &I) {
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pushReg(getFPReg(MI->getOperand(0)));
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pushReg(getFPReg(MI->getOperand(0)));
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pushReg(getFPReg(MI->getOperand(1)));
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pushReg(getFPReg(MI->getOperand(1)));
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break;
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break;
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case X86::FpSETRESULT32:
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case X86::FpSET_ST0_32:
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case X86::FpSETRESULT64:
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case X86::FpSET_ST0_64:
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case X86::FpSETRESULT80:
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case X86::FpSET_ST0_80:
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assert(StackTop == 1 && "Stack should have one element on it to return!");
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assert(StackTop == 1 && "Stack should have one element on it to return!");
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--StackTop; // "Forget" we have something on the top of stack!
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--StackTop; // "Forget" we have something on the top of stack!
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break;
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break;
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@@ -869,7 +869,7 @@ SDOperand X86TargetLowering::LowerRET(SDOperand Op, SelectionDAG &DAG) {
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SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Flag);
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SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Flag);
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SDOperand Ops[] = { Chain, Value };
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SDOperand Ops[] = { Chain, Value };
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Chain = DAG.getNode(X86ISD::FP_SET_RESULT, Tys, Ops, 2);
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Chain = DAG.getNode(X86ISD::FP_SET_ST0, Tys, Ops, 2);
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Flag = Chain.getValue(1);
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Flag = Chain.getValue(1);
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}
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}
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@@ -5565,7 +5565,7 @@ const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const {
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case X86ISD::FST: return "X86ISD::FST";
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case X86ISD::FST: return "X86ISD::FST";
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case X86ISD::FP_GET_ST0: return "X86ISD::FP_GET_ST0";
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case X86ISD::FP_GET_ST0: return "X86ISD::FP_GET_ST0";
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case X86ISD::FP_GET_ST0_ST1: return "X86ISD::FP_GET_ST0_ST1";
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case X86ISD::FP_GET_ST0_ST1: return "X86ISD::FP_GET_ST0_ST1";
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case X86ISD::FP_SET_RESULT: return "X86ISD::FP_SET_RESULT";
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case X86ISD::FP_SET_ST0: return "X86ISD::FP_SET_ST0";
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case X86ISD::CALL: return "X86ISD::CALL";
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case X86ISD::CALL: return "X86ISD::CALL";
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case X86ISD::TAILCALL: return "X86ISD::TAILCALL";
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case X86ISD::TAILCALL: return "X86ISD::TAILCALL";
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case X86ISD::RDTSC_DAG: return "X86ISD::RDTSC_DAG";
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case X86ISD::RDTSC_DAG: return "X86ISD::RDTSC_DAG";
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@@ -89,14 +89,14 @@ namespace llvm {
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/// writes a RFP result and a chain.
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/// writes a RFP result and a chain.
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FP_GET_ST0,
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FP_GET_ST0,
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/// FP_GET_ST0_ST1 - Same as FP_GET_RESULT except it copies two values
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/// FP_GET_ST0_ST1 - Same as FP_GET_ST0 except it copies two values
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/// ST(0) and ST(1).
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/// ST(0) and ST(1).
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FP_GET_ST0_ST1,
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FP_GET_ST0_ST1,
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/// FP_SET_RESULT - This corresponds to FpSETRESULT pseudo instruction
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/// FP_SET_ST0 - This corresponds to FpSET_ST0 pseudo instruction
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/// which copies the source operand to ST(0). It takes a chain+value and
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/// which copies the source operand to ST(0). It takes a chain+value and
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/// returns a chain and a flag.
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/// returns a chain and a flag.
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FP_SET_RESULT,
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FP_SET_ST0,
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/// CALL/TAILCALL - These operations represent an abstract X86 call
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/// CALL/TAILCALL - These operations represent an abstract X86 call
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/// instruction, which includes a bunch of information. In particular the
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/// instruction, which includes a bunch of information. In particular the
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@@ -35,7 +35,7 @@ def SDTX86CwdStore : SDTypeProfile<0, 1, [SDTCisPtrTy<0>]>;
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def X86fpget_st0 : SDNode<"X86ISD::FP_GET_ST0", SDTX86FpGet,
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def X86fpget_st0 : SDNode<"X86ISD::FP_GET_ST0", SDTX86FpGet,
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[SDNPHasChain, SDNPInFlag, SDNPOutFlag]>;
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[SDNPHasChain, SDNPInFlag, SDNPOutFlag]>;
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def X86fpset : SDNode<"X86ISD::FP_SET_RESULT", SDTX86FpSet,
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def X86fpset : SDNode<"X86ISD::FP_SET_ST0", SDTX86FpSet,
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[SDNPHasChain, SDNPOutFlag]>;
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[SDNPHasChain, SDNPOutFlag]>;
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def X86fld : SDNode<"X86ISD::FLD", SDTX86Fld,
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def X86fld : SDNode<"X86ISD::FLD", SDTX86Fld,
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[SDNPHasChain, SDNPMayLoad]>;
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[SDNPHasChain, SDNPMayLoad]>;
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@@ -150,14 +150,14 @@ def FpGET_ST0_ST1 : FpI_<(outs RFP80:$dst1, RFP80:$dst2), (ins), SpecialFP,
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let Defs = [ST0] in {
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let Defs = [ST0] in {
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def FpSETRESULT32 : FpI_<(outs), (ins RFP32:$src), SpecialFP,
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def FpSET_ST0_32 : FpI_<(outs), (ins RFP32:$src), SpecialFP,
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[(X86fpset RFP32:$src)]>;// ST(0) = FPR
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[(X86fpset RFP32:$src)]>;// ST(0) = FPR
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def FpSETRESULT64 : FpI_<(outs), (ins RFP64:$src), SpecialFP,
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def FpSET_ST0_64 : FpI_<(outs), (ins RFP64:$src), SpecialFP,
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[(X86fpset RFP64:$src)]>;// ST(0) = FPR
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[(X86fpset RFP64:$src)]>;// ST(0) = FPR
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def FpSETRESULT80 : FpI_<(outs), (ins RFP80:$src), SpecialFP,
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def FpSET_ST0_80 : FpI_<(outs), (ins RFP80:$src), SpecialFP,
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[(X86fpset RFP80:$src)]>;// ST(0) = FPR
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[(X86fpset RFP80:$src)]>;// ST(0) = FPR
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}
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}
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// FpIf32, FpIf64 - Floating Point Psuedo Instruction template.
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// FpIf32, FpIf64 - Floating Point Psuedo Instruction template.
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